Display device

• US 6,950,085 B2
• Filed: 10/19/2004
• Issued: 09/27/2005
• Est. Priority Date: 05/28/1997
• Status: Expired due to Fees

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Shionoiri, Yutaka, Koyama, Jun
• Primary Examiner(s): Shankar, Vijay
• Application Number:
  US10/967,209
• Publication Number:
  US 20050078072A1
• Time in Patent Office: 343 Days
• Field of Search: 345 87-104, 345204-206, 345691-699, 345209-214
• US Class Current: 345/92
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: G09G 2310/0232 Special driving of display border areas
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3674 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3685 Details of drivers for data electrodes
• CPC Class Codes: G09G 5/005 Adapting incoming signals to the display format of the display terminal

Abstract

In a display device of the active matrix type, write control circuits as provided in a source side driver circuit and a gate line side driver circuit are operable to selectively supply output signals of shift registers to a source line and a gate line. Whereby, it becomes possible to render the non-display section of an image clearer or visually distinguishable, which in turn leads to capability of successful execution of images with excellent quality.

Claims

1. A method for driving a display device including a pixel array having pixels having x rows and y columns (x and y are natural numbers), a first driver circuit having a first write control circuit and connected to x signal lines along a first direction, and a second driver circuit having a second write control circuit and connected to y signal lines along a second direction, comprising:

inputting signals for displaying an image by pixels having m (m<

x) rows and n columns (n<

y) to the first driver circuit and the second driver circuit;

inputting EN signals to the first write control circuit and the second write control circuit so that the signals for displaying an image are input to (p+1)-th to (p+m)-th (p<

x) signal lines along the first direction and (q+1)-th to (q+n)-th (q<

y) signal lines along the second direction.

2. A method according to claim 1, wherein signals not for displaying an image are input to 1st to p-th signal lines along the first direction, (p+m+1)-th to x-th signal lines along the first direction, 1-st to q-th signal lines along the second direction and (q+n+1)-th to y-th signal line along the second direction.

3. A method according to claim 1, wherein the first driver circuit is a gate line side driver circuit, the second driver circuit is a source line side driver circuit, the signal lines along the first direction are gate lines and the signal lines along the second direction are source lines.

4. A method according to claim 1, wherein at least one of the pixels have a thin film transistor.

5. A method according to claim 1, wherein the signals not for displaying an image are used for displaying black.

6. A method according to claim 1, wherein the pixel array has a display standard of one of EGA, VGA, SVGA, XGA and SXGA.

7. A method according to claim 1, wherein each of the signals for displaying an image by pixels having m rows and n columns is one of an NTSC signal, a PAL signal and an SECAM signal or generated by one of the NTSC signal, the PAL signal and the SECAM signal.

8. A method according to claim 1, wherein the display device is one of a liquid crystal display device and a electroluminescent display device.