Semiconductor device including band-engineered superlattice

• US 6,952,018 B2
• Filed: 11/19/2003
• Issued: 10/04/2005
• Est. Priority Date: 06/26/2003
• Status: Expired due to Term

• Current Assignee: Atomera Incorporated
• Original Assignee: RJ Mears LLC (Atomera Incorporated)
• Inventors: Dukovski, Ilija, Hytha, Marek, Mears, Robert J., Yiptong, Jean Augustin Chan Sow Fook, Kreps, Scott A.
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): Nguyen, Thinh T
• Application Number:
  US10/716,994
• Publication Number:
  US 20040262596A1
• Time in Patent Office: 685 Days
• Field of Search: 257/18, 257/22, 257/15, 257/13, 257/19, 257/25, 257/17, 438/380
• US Class Current: 257/18
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 21/823807 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/152 with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
• CPC Class Codes: H01L 29/155 Comprising only semiconductor materials H01L29/154 takes precedence
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

Claims

1. A semiconductor device comprising:

a superlattice comprising a plurality of stacked groups of layers;

each group of layers of said superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon;

said groups of layers arranged in an alternating pattern of first and second groups of layers, with each first group of layers comprising three base semiconductor monolayers, and each second group of layers comprising five base semiconductor monolayers;

said energy-band modifying layer comprising at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

2. A semiconductor device according to claim 1 wherein said superlattice has a common energy band structure therein.

3. A semiconductor device according to claim 1 wherein said superlattice has a higher charge carrier mobility in at least one direction than would otherwise be present.

4. A semiconductor device according to claim 3 wherein the higher charge carrier mobility results from a lower conductivity effective mass for the charge carriers in a parallel direction than would otherwise be present.

5. A semiconductor device according to claim 4 wherein the lower conductivity effective mass is less than two-thirds the conductivity effective mass that would otherwise occur.

6. A semiconductor device according to claim 3 the charge carriers having the higher mobility comprise at least one of electrons and holes.

7. A semiconductor device according to claim 1 wherein each base semiconductor portion comprises silicon.

8. A semiconductor device according to claim 1 wherein each energy band-modifying layer comprises oxygen.

9. A semiconductor device according to claim 1 wherein each energy band-modifying layer is a single monolayer thick.

10. A semiconductor device according to claim 1 wherein said superlattice further comprises a base semiconductor cap layer on an uppermost group of layers.

11. A semiconductor device according to claim 1 wherein each non-semiconductor monolayer is thermally stable through deposition of a next layer.

12. A semiconductor device according to claim 1 wherein each base semiconductor portion comprises a base semiconductor selected from the group consisting of Group IV semiconductors, Group III-V semiconductors, and Group II-VI semiconductors.

13. A semiconductor device according to claim 1 wherein each energy band-modifying layer comprises a non-semiconductor selected from the group consisting of oxygen, nitrogen, fluorine, and carbon-oxygen.

14. A semiconductor device according to claim 1 further comprising a substrate adjacent said superlattice.

15. A semiconductor device according to claim 1 wherein said superlattice further comprises at least one type of conductivity dopant therein.

16. A semiconductor device according to claim 1 wherein said superlattice defines a channel of a transistor.

17. A semiconductor device comprising:

a superlattice comprising a plurality of stacked groups of layers;

each group of layers of said superlattice comprising a plurality of stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer thereon;

said groups of layers arranged in an alternating pattern of first and second groups of layers, with each first group of layers comprising three base silicon monolayers, and each second group of layers comprising five base silicon monolayers;

said energy-band modifying layer comprising at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions.

18. A semiconductor device according to claim 17 wherein said superlattice has a common energy band structure therein.

19. A semiconductor device according to claim 17 wherein said superlattice has a higher charge carrier mobility in at least one direction than would otherwise be present.

20. A semiconductor device according to claim 19 wherein the higher charge carrier mobility results from a lower conductivity effective mass for the charge carriers in a parallel direction than would otherwise be present.

21. A semiconductor device according to claim 19 the charge carriers having the higher mobility comprise at least one of electrons and holes.

22. A semiconductor device according to claim 17 wherein wherein each at least one energy band-modifying oxygen monolayer is a single oxygen monolayer thick.

23. A semiconductor device according to claim 17 wherein said superlattice further comprises a base semiconductor cap layer on an uppermost group of layers.

24. A semiconductor device according to claim 17 further comprising a substrate adjacent said superlattice.

25. A semiconductor device according to claim 17 wherein said superlattice further comprises at least one type of conductivity dopant therein.

26. A semiconductor device according to claim 17 wherein said superlattice defines a channel of a transistor.