Electrically isolated pillars in active devices

• US 6,952,043 B2
• Filed: 06/27/2002
• Issued: 10/04/2005
• Est. Priority Date: 06/27/2002
• Status: Expired due to Term

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: Matrix Semiconductor, Inc. (Western Digital Corporation)
• Inventors: Cleeves, James M., Bhatia, Manish, Knall, N. Johan, Vyvoda, Michael A.
• Primary Examiner(s): Smoot, Stephen W.
• Application Number:
  US10/185,507
• Publication Number:
  US 20040002186A1
• Time in Patent Office: 1,195 Days
• Field of Search: 257/530, 257/594, 257/623, 438/131, 438/600
• US Class Current: 257/530
• CPC Class Codes: H01L 27/1021 including diodes only

Abstract

A method of forming an active device is provided. The method includes performing a first patterning operation on a first plurality of layers. This first patterning operation defines a first feature of the active device. Then, a second patterning operation can be performed on at least one layer of the first plurality of layers. This second patterning operation defines a second feature of the active device. Of importance, the first and second patterning operations are performed substantially back-to-back, thereby ensuring that the active device can accurately function.

Claims

1. An incipient diode structure including vertically formed diodes, the structure comprising;

a first set of strips including a first terminal not comprising doped silicon and a first portion of a first diode, the first portion comprising doped silicon;

a first pillar including a second portion of the first diode;

a second set of strips including a common terminal shared by the first diode and a second diode;

a second pillar including a first portion of the second diode; and

a third set of strips including a second portion of the second diode and another terminal of the second diode, wherein each of the pillars is substantially free of stringers.

2. The incipient diode structure of claim 1, wherein the first set of strips includes:

a first heavily doped silicon strip of a first type;

a first conductive strip formed on the first heavily doped silicon strip;

a second heavily doped silicon strip of the first type formed on the first conductive strip; and

an antifuse strip formed on the second heavily doped silicon strip.

3. The incipient diode structure of claim 2, wherein the first pillar includes:

a first silicon pillar structure of a first type formed on the antifuse strip.

4. The incipient diode structure of claim 3, wherein the second set of strips includes:

a third heavily doped silicon strip of a second type formed on the first silicon pillar structure; and

a second conductive strip formed on the third heavily doped silicon strip.

5. The incipient diode structure of claim 4, wherein the second pillar includes:

a first heavily doped silicon pillar structure of the second type formed on the second conductive strip;

a second silicon pillar structure of the second type formed on the first heavily doped silicon pillar structure;

a third heavily doped silicon pillar structure of the first type formed on the second silicon pillar structure; and

an antifuse pillar structure formed on the third silicon pillar structure.

6. The incipient diode structure of claim 5, wherein the third set of strips includes:

a fourth heavily doped silicon strip of the first type formed on the antifuse pillar structure; and

a third conductive strip formed on the fourth heavily doped silicon strip.

7. The incipient diode structure of claim 6, wherein the first, second, and third conductive strips include a refractory metal.

8. The incipient diode structure of claim 7, wherein the antifuse strip includes deposited silicon dioxide.

9. The incipient diode structure of claim 8, wherein the antifuse pillar structure is grown with rapid thermal oxidation (RTO).