Method and apparatus for synchronizing the coding and decoding of information in an integrated services hub

• US 6,952,399 B1
• Filed: 10/12/2000
• Issued: 10/04/2005
• Est. Priority Date: 10/12/2000
• Status: Expired due to Fees

• Current Assignee: Sprint Communications Company LP (Deutsche Telekom AG)
• Original Assignee: Sprint Communications Company LP (Deutsche Telekom AG)
• Inventors: Goodrich, Earl II, Bayerl, Thomas R.
• Primary Examiner(s): Ton, Dang
• Assistant Examiner(s): MEHRA, INDER P
• Application Number:
  US09/687,683
• Time in Patent Office: 1,818 Days
• Field of Search: 370/352, 370/503, 370/229, 370/230.1, 370/231, 370/395.62, 370/516, 375/354, 375/355, 375/356, 375/357, 375/358, 375/371, 327/326, 713/400, 702/89
• US Class Current: 370/229
• CPC Class Codes: H04J 3/0632 Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES] queuing arrangements in packet switching elements H04L49/90; synchronising systems for the synchronous transmission of a pulse code modulated video signal with one or more other pulse code modulated signals H04N7/56
• CPC Class Codes: H04L 12/5601 Transfer mode dependent, e.g. ATM
• CPC Class Codes: H04L 2012/5607 Radio
• CPC Class Codes: H04L 2012/5616 Terminal equipment, e.g. codecs, synch.
• CPC Class Codes: H04L 2012/5671 Support of voice
• CPC Class Codes: H04L 2012/5674 Synchronisation, timing recovery or alignment
• CPC Class Codes: H04L 2012/5682 Threshold; Watermark

Abstract

A method and system for extrapolating a sampling rate from received digital cells in an integrated services hub in residential or business telecommunication systems. The system is implemented by a CPU controlling the hub operations. An input buffer is implemented by the CPU and its RAM. The CPU generates a fill level indicating the relative capacity of the buffer that is filled with samples not yet coupled to a CODEC. The CPU produces a divisor based on the fill level. A baud rate generator in the CPU uses the CPU local clock and the divisor to produce a sample rate at which buffer samples are coupled to the CODEC. The divisor is adjusted to maintain the fill level within a desired range. The sample rate is also used to sample analog signals coupled to the CODEC.

Claims

1. In an integrated services hub for coupling digital signals on a wide area network to and from analog signals in residential or business telecommunications equipment, the hub having a CPU controlling the operations of the hub, a CODEC, a local clock, an input buffer coupling digital signals received from the wide area network to the CODEC, the buffer implemented in memory operated by the CPU, and a baud rate generator in the CPU, a method for generating a sampling rate of coupling digital signals from the input buffer to the CODEC synchronized with a rate at which digital signals are received from the wide area network, comprising:

using the CPU to produce a fill level indicator representative of the capacity of the buffer that contains digital signals received from the wide area network and not yet coupled to the CODEC,

coupling the local clock to an input of the baud rate generator,

using the CPU to generate a divisor coupled to the baud rate generator,

using an output of the baud rate generator as the sampling rate for coupling digital signals from the input buffer to the CODEC, and

adjusting the divisor to maintain the fill level of the input buffer within a preselected range.

2. The method of claim 1, further comprising:

decreasing the divisor when the fill level increases above a first preselected value, and

increasing the divisor when the fill level decreases below a second preselected value.

3. The method of claim 1, farther comprising:

using the output of the baud rate generator as a sampling rate for coupling analog signals from the residential or business telecommunications equipment to the CODEC.

4. An integrated services hub for coupling digital signals in a wide area network to and from analog signals in residential or business telecommunications equipment, comprising:

a CPU controlling operations of the hub,

a CODEC,

an input buffer coupling digital signals received from the wide area network to the CODEC, the buffer implemented in memory operated by the CPU,

a local clock coupled to the CPU,

a baud rate generator implemented in the CPU having a first input coupled to the local clock, having a second input for receiving a divisor, and having an output coupled to the input buffer providing a sampling rate of coupling digital signals from the input buffer to the CODEC,

the CPU producing a fill level indicator representative of the capacity of the buffer that contains digital signals received from the wide area network and not yet coupled to the CODEC,

the CPU generating a divisor coupled to the baud rate generator, and adjusting the divisor to maintain the fill level of the input buffer within a preselected range,

whereby the sampling rate of coupling digital signals from the input buffer to the CODEC is synchronized with a rate at which digital signals are received from the wide area network.

5. The integrated services hub according to claim 4, wherein:

the CPU decreases the divisor when the fill level increases above a first preselected value, and

the CPU increases the divisor when the fill level decreases below a second preselected value.

6. The integrated services hub of claim 4, wherein:

the CODEC includes an analog to digital converter having a first input receiving analog signals from the residential or business telecommunications equipment, an output providing digitized signals coupled to the wide area network, and a second input coupled to the baud rate generator output and controlling the sampling rate at which the analog signals are sampled by the CODEC.