Manufacturing method of a field emission display having porous silicon dioxide insulating layer

• US 6,953,375 B2
• Filed: 03/29/2004
• Issued: 10/11/2005
• Est. Priority Date: 08/26/1998
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ahn, Kie Y., Forbes, Leonard
• Primary Examiner(s): Santiago, Mariceli
• Application Number:
  US10/813,204
• Publication Number:
  US 20040189175A1
• Time in Patent Office: 561 Days
• Field of Search: 445 49- 51, 445/24, 445/25, 438/20
• US Class Current: 445/50
• CPC Class Codes: H01J 1/3044 Point emitters
• CPC Class Codes: H01J 9/025 of field emission cathodes

Abstract

A field emission display includes a substrate and a plurality of emitters formed on columns on the substrate. The display also includes a porous dielectric layer formed on the substrate and the columns. The porous dielectric layer has an opening formed about each of the emitters and has a thickness substantially equal to a height of the emitters above the substrate. The porous dielectric layer may be formed by oxidation of porous polycrystalline silicon. The display also includes an extraction grid formed substantially in a plane defined by respective tips of the plurality of emitters and having an opening surrounding each tip of a respective one of the emitters. The display further includes a cathodoluminescent-coated faceplate having a planar surface formed parallel to and near the plane of tips of the plurality of emitters. The porous dielectric layer results in columns having less capacitance compared to prior art displays. Accordingly, less electrical power is required to charge and discharge the columns in order to drive the emitters. As a result, the display is able to form luminous images while consuming reduced electrical power compared to prior art displays.

Claims

1. A method of fabricating a porous dielectric layer in a field emission display comprising:

forming a polycrystalline silicon layer on a substrate and a plurality of columns on the substrate;

forming pores in the polycrystalline silicon layer to form a porous polycrystalline silicon layer; and

oxidizing the porous polycrystalline silicon layer to provide a porous silicon dioxide layer.

2. The method of claim 1, wherein the act of forming pores in the polycrystalline silicon layer comprises anodizing the polycrystalline silicon layer.

3. The method of claim 2 wherein the act of anodizing the polycrystalline silicon layer forms a porous polycrystalline silicon layer having at least 50% voids and the act of oxidizing the porous polycrystalline silicon layer forms a porous silicon dioxide layer having at least 22.5% voids.

4. The method of claim 2 wherein the act of anodizing the polycrystalline silicon layer forms a porous polycrystalline silicon layer having at least 75% voids and the act of oxidizing the porous polycrystalline silicon layer forms a porous silicon dioxide layer having at least 61.5% voids.

5. The method of claim 1 wherein the act of oxidizing the porous polycrystalline silicon layer to provide a porous silicon dioxide layer comprises oxidizing the porous polycrystalline silicon layer to form a porous silicon dioxide layer having a relative dielectric constant of less than 3.

6. The method of claim 1 wherein the act of oxidizing the porous polycrystalline silicon layer to provide a porous silicon dioxide layer comprises oxidizing the porous polycrystalline silicon layer to form a porous silicon dioxide layer having a relative dielectric constant of less than 1.6.

7. The method of claim 1 wherein the porous silicon dioxide layer is comprised of columnar silicon dioxide spacers with pores between the columnar spacers.

8. The method of claim 1, further comprising planarizing the porous silicon dioxide layer.

9. The method of claim 8, wherein the act of planarizing the porous silicon dioxide layer comprises chemical-mechanical polishing the porous silicon dioxide layer.

10. A method of fabricating a field emission display baseplate comprising:

forming columns on a substrate;

forming a silicon layer on the columns and the substrate;

etching the silicon layer to form a porous silicon layer;

oxidizing the porous silicon layer to form a porous silicon dioxide layer;

planarizing the porous silicon dioxide layer;

forming an extraction grid on the porous silicon dioxide layer;

etching openings through the porous silicon dioxide layer and the extraction grid; and

forming emitters in the openings in the porous silicon dioxide and the extraction grid.

11. The method of claim 10 wherein the act of etching the silicon layer forms a porous silicon layer having at least 50% voids and the act of oxidizing the porous silicon layer forms a porous silicon dioxide layer having at least 22.5% voids.

12. The method of claim 10 wherein the act of etching the silicon layer forms a porous silicon layer having at least 75% voids and the act of oxidizing the porous silicon layer forms a porous silicon dioxide layer having at least 61.5% voids.

13. The method of claim 10 wherein the act of oxidizing the porous silicon layer to form a porous silicon dioxide layer comprises oxidizing the porous silicon layer to form a porous silicon dioxide layer having a relative dielectric constant of less than 3.

14. The method of claim 10 wherein the act of oxidizing the porous silicon layer to form a porous silicon dioxide layer comprises oxidizing the porous silicon layer to form a porous silicon dioxide layer having a relative dielectric constant of less than 1.6.

15. The method of claim 10 wherein the act of etching the silicon layer to form a porous silicon layer comprises anodizing the silicon layer to form the porous silicon layer.

16. The method of claim 10 wherein the act of forming emitters comprises forming a high resistance emitter body of silicon monoxide and metal.

17. The method of claim 16 wherein the act of forming a high resistance emitter body comprises forming a high resistance emitter body by co-evaporation of silicon monoxide and a metal at an evaporation angle of 90 degrees with respect to the substrate surface.

18. The method of claim 10, further comprising, after the act of etching openings through the porous silicon dioxide layer and the extraction grid and prior to the act of forming emitters in the openings in the porous silicon dioxide layer and the extraction grid, forming a sacrificial layer on the extraction grid by angle evaporation.

19. The method of claim 18 wherein the act of forming a sacrificial layer on the extraction grid by angle evaporation comprises forming a sacrificial layer on the extraction grid by angle evaporation at an angle of seventy five degrees or more from a surface normal of the substrate.

20. The method of claim 18 wherein the act of forming emitters comprises:

forming emitter bodies by co-evaporating silicon monoxide and a metal; and

forming emitter tips by evaporating a material having a work function of less than four electron volts.

21. The method of claim 10 wherein the porous silicon dioxide layer is comprised of columnar silicon dioxide spacers with pores between the columnar spacers.

22. The method of claim 10, wherein the act of planarizing the porous silicon dioxide layer comprises chemical-mechanical polishing the porous silicon dioxide layer.

23. A method of fabricating a field emission display baseplate comprising:

forming conductors on a substrate;

forming a porous silicon dioxide layer on the conductors and on the substrate;

planarizing the porous silicon dioxide layer;

forming an extraction grid on the porous silicon dioxide layer;

etching openings through the porous silicon dioxide layer and the extraction grid; and

forming emitters in the openings in the porous silicon dioxide layer and the extraction grid.

24. The method of claim 23 wherein the act of fanning emitters comprises forming a high resistance emitter body of silicon monoxide and metal.

25. The method of claim 24 wherein the act of forming a high resistance emitter body comprises forming a high resistance emitter body by co-evaporation of silicon monoxide and a metal at an evaporation angle of 90 degrees with respect to the substrate surface.

26. The method of claim 23, further comprising, after the act of etching openings through the porous silicon dioxide layer and the extraction grid and prior to the act of forming emitters in the openings in the porous silicon dioxide layer and the extraction grid, forming a sacrificial layer on the extraction grid by angle evaporation.

27. The method of claim 26 wherein the act of forming a sacrificial layer on the extraction grid by angle evaporation comprises forming a sacrificial layer on the extraction grid by angle evaporation at an angle of seventy five degrees or more from a surface normal of the substrate.

28. The method of claim 26 wherein the act of forming emitters comprises:

forming emitter bodies by co-evaporating silicon monoxide and a metal; and

forming emitter tips by evaporating a material having a work function of less than four electron volts.

29. The method of claim 23 wherein the act of forming a porous silicon dioxide layer comprises forming a porous silicon dioxide layer having a dielectric constant of less than 3.

30. The method of claim 23 wherein the act of forming a porous silicon dioxide layer comprises forming a porous silicon dioxide layer having a dielectric constant of less than 1.6.

31. The method of claim 23 wherein the porous silicon dioxide layer is comprised of columnar silicon dioxide spacers with pores between the columnar spacers.

32. The method of claim 23 wherein the act of forming a porous silicon dioxide layer comprises forming a porous silicon layer having at least 22.5% voids.

33. The method of claim 23 wherein the act of forming a porous silicon dioxide layer comprises forming a porous silicon layer having a dielectric constant of less than 3.

34. The method of claim 23 wherein the act of forming a porous silicon dioxide layer comprises forming a porous silicon layer having at least 61.5% voids.

35. The method of claim 23, wherein the act of planarizing the porous silicon dioxide layer comprises chemical-mechanical polishing the porous silicon dioxide layer.