Method of manufacturing a component built-in module

• US 6,955,948 B2
• Filed: 10/15/2002
• Issued: 10/18/2005
• Est. Priority Date: 01/19/2001
• Status: Expired due to Term

• Current Assignee: Adeia Semiconductor Advanced Technologies Inc. (f/k/a Tessera Advanced Technologies, Inc.) (Adeia Inc.)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Komatsu, Shingo, Nakatani, Seiichi, Asahi, Toshiyuki, Sugaya, Yasuhiro
• Primary Examiner(s): GURLEY, LYNNE ANN
• Application Number:
  US10/271,937
• Publication Number:
  US 20030062624A1
• Time in Patent Office: 1,099 Days
• Field of Search: 438/125, 438/622, 438/629, 438/637, 438/640, 438667-668, 438/672, 438/675, 438700-701, 438/713, 438/978, 257/750, 257/758, 257/774, 257/775, 257/778, 257/783, 257/723
• US Class Current: 438/125
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01025 Manganese [Mn]
• CPC Class Codes: H01L 2924/01046 Palladium [Pd]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12044 OLED
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/19105 in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H05K 1/187 the patterned circuits being prefabricated circuits, which are not yet attached to a permanent insulating substrate, e.g. on a temporary carrier
• CPC Class Codes: H05K 2201/10378 Interposers
• CPC Class Codes: H05K 3/20 by affixing prefabricated conductor pattern H05K1/187, H05K3/046, H05K3/4658, H05K3/4682 takes precedence
• CPC Class Codes: H05K 3/4069 for via connections in organic insulating substrates
• CPC Class Codes: H05K 3/4602 characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
• CPC Class Codes: H05K 3/4614 : the electrical connections between the circuit boards being made during lamination
• CPC Class Codes: H05K 3/4652 : Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern H05K3/4647 takes precedence

Abstract

A component built-in module includes an electric insulation layer, first wiring patterns in a plurality of layers that are laminated with the electric insulation layer being interposed therebetween, at least one first inner via electrically connecting the first wiring patterns in different layers with each other, and at least one electronic component that is embedded in the electric insulation layer and is mounted on any one of the first wiring patterns in the plurality of layers, wherein at least one of the first inner vias is present in a range that overlaps a range in which the electronic component is present in a lamination direction in which the first wiring patterns are laminated, and has a height in the lamination direction that is smaller than a height of the electronic component. Since the first inner via has a small height, the via diameter can be decreased. Therefore, it is possible to provide a component built-in module that has high reliability and is suitable for high-density component mounting.

Claims

1. A method for manufacturing a component built-in module, comprising the steps of:

forming a first inner via in an electric insulation layer;

mounting an electronic component on a first wiring pattern; and

laminating the electric insulation layer and another wiring pattern different from said first wiring pattern in this order on a surface of the first wiring pattern on which the electronic component is mounted so theat said first wiring pattern and the another wiring pattern, which are provided opposite each other with the electric insulation layer being interposed therebetween, are electrically connected through the first inner via,

wherein the electric insulation layer before being laminated has a thickness smaller than a height of the electronic component in a direction of the lamination.

2. The method according to claim 1, wherein:

the another wiring pattern is provided on a surface of another electric insulation layer different from said electric insulation layer; and

the another wiring pattern is connected with an inner via formed in the another electric insulation layer.

3. The method according to claim 2, wherein the another electric insulation layer has a wiring pattern on the other surface thereof, and the wiring pattern on the other surface is connected with the inner via of the another electric insulation layer.

4. The method according to claim 1, wherein the another wiring pattern is carried on a carrier,

the method further comprising a step of removing the carrier that is carried out after the laminating step.

5. The method according to claim 1, wherein the another wiring pattern is a second wiring pattern exposed on a surface of a wiring board, the wiring board including:

second wiring patterns in at least two layers, including said second wiring pattern; and

a through hole and/or a second inner via that electrically connects the second wiring patterns in different layers with each other.

6. The method according to claim 1, wherein the electric insulation layer before being laminated has a hole for accepting the electronic component.

7. The method according to claim 1, wherein at least a part of the electronic component is embedded in the electric insulation layer upon making the electric connection.

8. The method according to claim 1, wherein the electric insulation layer is cured upon the electric connection.

9. The method according to claim 1, wherein at least a part of the electronic component is embedded in the electric insulation layer and the electric insulation layer is cured upon the electric connection.

10. The method according to claim 1, wherein the electric insulation layer before being laminated is in a non-cured state.

11. A method for manufacturing a component built-in module, comprising the steps of:

forming a first inner via in an electric insulation layer;

preparing a wiring board including second wiring patterns in at least two layers, and a through hole and/or a second inner via that electrically connects the second wiring patterns in different layers with each other;

mounting an electronic component on the second wiring pattern that is exposed on a surface of the wiring board; and

laminating the electric insulation layer and a first wiring pattern in this order on the second wiring pattern on which the electronic component is mounted so that the second wiring pattern and the first wiring pattern, which are provided opposite each other with the electric insulation layer being interposed therebetween, are electrically connected through the first inner via,

wherein the electric insulation layer before being laminated has a thickness smaller than a height of the electronic component in a direction of the lamination.

12. The method according to claim 11, wherein:

the first wiring pattern is provided on a surface of another electric insulation layer different from said electric insulation layer; and

the first wiring pattern is connected with an inner via formed in the another electric insulation layer.

13. The method according to claim 12, wherein the another electric insulation layer has a wiring pattern on the other surface thereof, and the wiring pattern on the other surface is connected with the inner via of the another electric insulation layer.

14. The method according to claim 11, wherein the first wiring pattern is carried on a carrier,

the method further comprising a step of removing the carrier that is carried out after the laminating step.

15. The method according to claim 11, wherein the electric insulation layer before being laminated has a hole for accepting the electronic component.

16. The method according to claim 11, wherein at least a part of the electronic component is embedded in the electric insulation layer upon making the electric connection.

17. The method according to claim 11, wherein the electric insulation layer is cured upon the electric connection.

18. The method according to claim 11, wherein at least a part of the electronic component is embedded in the electric insulation layer and the electric insulation layer is cured upon the electric connection.

19. The method according to claim 11, wherein the electric insulation layer before being laminated is in a non-cured state.