Method and apparatus to combine heterogeneous hardware interfaces for next generation packet voice module devices
First Claim
Patent Images
1. A host platform/PVDM (packet voice data module) interface where the packet module includes at least one on-board DSP compatible with one particular host parallel bus protocol of a set of parallel bus protocols, said interface comprising:
- a parallel bus coupled to the host ports of the DSP;
a non-volatile memory holding information indicating which one of the parallel bus protocols is utilized by the on-board DSP;
a serial bus coupled to the non-volatile memory for reading the information held on the non-volatile memory; and
termination logic, capable of implementing each protocol in the set of parallel bus protocols, for reading the information from the non-volatile memory and implementing the parallel bus protocol, identified by the non-volatile memory, utilized by the on-board DSP.
1 Assignment
0 Petitions
Accused Products
Abstract
A Packet Voice Data Module (PVDM)/Host Platform Interface that supports multiple vendor'"'"'s DSPs without sacrificing performance. The interface also provides a hardware chip select for selecting non-DSP functionality to expand the use of the interface. Testing and module identification functions are also enabled by the interface.
-
Citations
19 Claims
-
1. A host platform/PVDM (packet voice data module) interface where the packet module includes at least one on-board DSP compatible with one particular host parallel bus protocol of a set of parallel bus protocols, said interface comprising:
-
a parallel bus coupled to the host ports of the DSP;
a non-volatile memory holding information indicating which one of the parallel bus protocols is utilized by the on-board DSP;
a serial bus coupled to the non-volatile memory for reading the information held on the non-volatile memory; and
termination logic, capable of implementing each protocol in the set of parallel bus protocols, for reading the information from the non-volatile memory and implementing the parallel bus protocol, identified by the non-volatile memory, utilized by the on-board DSP. - View Dependent Claims (2, 3, 4, 5)
-
-
6. A method for interfacing a host platform and a PVDM (packet voice data module), where the packet module includes at least one on-board DSP (digital signal processor), which is compatible with one particular host parallel bus protocol out of a set of parallel bus protocols that can be implemented by host platform, and where the PVDM includes a non-volatile memory holding identification information identifying the type of on-board DSP, said method, with a configurable parallel bus and serial bus coupling the host platform and PVDM, said method, performed by host processor on the host platform, comprising the steps of:
-
reading the non-volatile memory over the serial bus to access the identification information to identify a particular parallel bus protocol, out of the set of parallel bus protocols, that is compatible with the on-board DSP; and
configuring the parallel bus to implement the particular parallel bus protocol to communicate with the on-board DSP. - View Dependent Claims (7, 8, 9)
-
-
10. A system for interfacing a host platform and a PVDM (packet voice data module), where the packet module includes at least one on-board DSP (digital signal processor), which is compatible with one particular host parallel bus protocol out of a set of parallel bus protocols that can be implemented by host platform, and where the PVDM includes a non-volatile memory holding identification information identifying the type of on-board DSP, with a configurable parallel bus and serial bus coupling the host platform and PVDM, said system comprising:
-
means for reading the non-volatile memory over the serial bus to access the identification information to identify a particular parallel bus protocol, out of the set of parallel bus protocols, that is compatible with the on-board DSP; and
means for configuring the parallel bus to implement the particular parallel bus protocol to communicate with the on-board DSP. - View Dependent Claims (11, 12, 13)
-
-
14. A computer program product, executed by a host processor, for interfacing a host platform and a PVDM (packet voice data module), where the packet module includes at least one on-board DSP (digital signal processor), which is compatible with one particular host parallel bus protocol out of a set of parallel bus protocols that can be implemented by host platform, and where the PVDM includes a non-volatile memory holding identification information identifying the type of on-board DSP, with a configurable parallel bus and serial bus coupling the host platform and PVDM, said computer program product comprising:
-
a computer usable medium having computer readable program code physically embodied therein, said computer program product further comprising;
computer readable program code executed by the host processor for reading the non-volatile memory over the serial bus to access the identification information to identify a particular parallel bus protocol, out of the set of parallel bus protocols, that is compatible with the on-board DSP; and
computer readable program code executed by the host processor for configuring the parallel bus to implement the particular parallel bus protocol to communicate with the on-board DSP. - View Dependent Claims (15, 16, 17)
-
-
18. A PVDM (packet voice data module) to be coupled to a slot on a motherboard, where the PVDM includes at least one on-board DSP compatible with one particular host parallel bus protocol of a set of parallel bus protocols, said PVDM comprising:
-
a parallel bus interface coupled to the host ports of the DSP, with the parallel bus interface adapted to be coupled to a parallel bus on the motherboard;
a non-volatile memory holding information indicating which one of the parallel bus protocols is utilized by the on-board DSP;
a serial bus interface coupled to the non-volatile memory to allow a processor on the motherboard to read the information held on the non-volatile memory so that termination logic on the motherboard, capable of implementing each protocol in the set of parallel bus protocols, can read the information from the non-volatile memory and implement the parallel bus protocol, identified by the non-volatile memory, utilized by the on-board DSP.
-
-
19. A host platform having a motherboard including a processor and a slot for accepting a PVDM (packet voice data module) to be coupled to a slot on a motherboard, where the PVDM includes at least one on-board DSP compatible with one particular host parallel bus protocol of a set of parallel bus protocols and also includes a non-volatile memory holding information indicating which one of the parallel bus protocols is utilized by the on-board DSP, said host platform comprising:
-
a parallel bus coupled to the host ports of the DSP, with the parallel bus interface adapted to be coupled to a parallel bus on the motherboard;
a serial bus interface adapted to be coupled to the non-volatile memory on the PVDM to allow the processor on the motherboard to read the information held on the non-volatile memory so that termination logic on the motherboard, capable of implementing each protocol in the set of parallel bus protocols, can read the information from the non-volatile memory and implement the parallel bus protocol, identified by the non-volatile memory, utilized by the on-board DSP.
-
Specification