Concurrent dual pipeline for acquisition, processing and transmission of digital video and high resolution digital still photographs

• US 6,961,083 B2
• Filed: 12/21/2001
• Issued: 11/01/2005
• Est. Priority Date: 12/21/2001
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Tretter, Daniel, Obrador, Pere
• Primary Examiner(s): Groody, James J.
• Assistant Examiner(s): GENCO, BRIAN C
• Application Number:
  US10/023,808
• Publication Number:
  US 20040218059A1
• Time in Patent Office: 1,411 Days
• Field of Search: 386/117, 386/120, 386/121, 348/262, 348/220.1
• US Class Current: 348/220.1
• CPC Class Codes: H04N 1/212 Motion video recording combined with still video recording television signal recording H04N5/76
• CPC Class Codes: H04N 23/45 for generating image signals from two or more image sensors being of different type or operating in different modes, e.g. with a CMOS sensor for moving images in combination with a charge-coupled device [CCD] for still images
• CPC Class Codes: H04N 23/60 Control of cameras or camera modules
• CPC Class Codes: H04N 23/667 Camera operation mode switching, e.g. between still and video, sport and normal or high- and low-resolution modes
• CPC Class Codes: H04N 23/843 Demosaicing, e.g. interpolating colour pixel values
• CPC Class Codes: H04N 5/765 Interface circuits between an apparatus for recording and another apparatus
• CPC Class Codes: H04N 5/772 the recording apparatus and the television camera being placed in the same enclosure
• CPC Class Codes: H04N 5/781 on disks or drums
• CPC Class Codes: H04N 5/85 on discs or drums
• CPC Class Codes: H04N 9/7921 for more than one processing mode
• CPC Class Codes: H04N 9/8042 involving data reduction

Abstract

A digital video camera system may utilize a concurrent dual video and still image pipeline that simultaneously acquires, processes, transmits and/or stores digital video and high resolution digital still image photographs. The concurrent dual pipeline may include a video pipeline optimized for digital video and a still image pipeline optimized for high resolution digital still images. As a result, high resolution still image photographs may be acquired during video recording without any interference with the video recording or any impact on the quality of the video or the still image photographs.

Claims

1. A method for concurrently acquiring, processing, and transmitting digital video and still images, comprising:

acquiring video frames from one or more image sensors;

processing the video frames using a video pipeline, wherein the video pipeline includes one or more processors;

temporarily storing the video frames in a frame buffer when one or more high resolution still images are acquired during the video frame acquisition; and

processing the high resolution still images using a still image pipeline, wherein the still image pipeline runs concurrently with the video pipeline.

2. The method of claim 1, wherein the processing the video frames step comprises:

downsampling and demosaicing the video frames; and

color correcting the video frames.

3. The method of claim 1, wherein the processing the high resolution still images step comprises:

downsampling and demosaicing the high resolution still images using complex demosaicing algorithms; and

color correcting the high resolution still images using complex color correction algorithms.

4. The method of claim 1, further comprising compressing the video frames and the high resolution still images.

5. The method of claim 1, further comprising transmitting the video frames and the high resolution still images through communications channels.

6. The method of claim 1, further comprising storing the video frames and high resolution still images in a storage device.

7. The method of claim 1, further comprising emptying the frame buffer by the processors after the high resolution still images are processed, transmitted or stored.

8. The method of claim 1, wherein the processing the high resolution still images step includes processing the high resolution still images using the same image sensors and the same processors in the video pipeline.

9. The method of claim 1, wherein the processing the video frames step and the processing the high resolution still images step include processing the video frames and the high resolution still images using separate hardware processing pipelines.

10. A concurrent dual video and still image pipeline for a video camera system, comprising:

one or more image sensors capable of acquiring video frames and high resolution still images, wherein the high resolution still images are acquired during the video frame acquisition;

a sensor controller capable of storing the video frames into a memory;

one or more processors capable of concurrently processing the video frames and the high resolution still images, wherein the video frames are processed using a video pipeline, and the high resolution still images are processed using a still image pipeline, and wherein the video pipeline runs concurrently with the still image pipeline;

a frame buffer capable of temporarily storing the video frames when the high resolution still images are being processed.

11. The concurrent dual video and still image pipeline of claim 10, further comprising:

a storage device capable of storing the video frames and the high resolution still images.

12. The concurrent dual video and still image pipeline of claim 10, further comprising:

an input/output unit capable of transmitting the video frames and the high resolution still images through communications channels.

13. The concurrent dual video and still image pipeline of claim 10, wherein the frame buffer is emptied after the high resolution still images are processed, transmitted or stored.

14. The concurrent dual video and still image pipeline of claim 10, wherein the processors are selected from a microprocessor, an application specific integrated circuit (ASIC), and a digital signal processor.

15. The concurrent dual video and still image pipeline of claim 10, wherein the processors downsample, demosaic, and color correct the video frames.

16. The concurrent dual video and still image pipeline of claim 10, wherein the processors downsample, demosaic, and color correct the high resolution still images using complex algorithms.

17. The concurrent dual video and still image pipeline of claim 10, wherein the video pipeline and the still image pipeline use the same image sensors and the same processors.

18. The concurrent dual video and still image pipeline of claim 10, wherein the video pipeline and the still image pipeline use separate image sensors and separate hardware processing pipelines.

19. The concurrent dual video and still image pipeline of claim 10, wherein the video pipeline and the still image pipeline use the same image sensors and separate hardware processing pipelines.

20. A computer readable medium providing instructions for concurrently acquiring, processing, and transmitting digital video and high resolution still images, the instructions comprising:

acquiring video frames from one or more image sensors;

processing the video frames using a video pipeline, wherein the video pipeline includes one or more processors;

temporarily storing the video frames in a frame buffer when one or more high resolution still images are acquired during the video frame acquisition; and

processing the high resolution still images using a still image pipeline, wherein the still image pipeline runs concurrently with the video pipeline.

21. A method for processing digital video and still images, comprising the steps of:

acquiring video frames from one or more image sensors;

processing the video frames using a video pipeline, wherein the video pipeline includes one or more processors;

storing the video frames in a frame buffer while one or more high resolution still images are acquired during the video frame acquisition; and

processing the high resolution still images using a still image pipeline,

wherein still image processing, including image compression, performed by the still image pipeline on said one or more high resolution images runs concurrently with video processing, including image compression, performed by the video pipeline on said video frames.

22. The method of claim 21, wherein said one or more image sensors are two image sensors, one of which provides input to said video pipeline and one of which provides input to said still image pipeline.

23. The method of claim 22, wherein said two image sensors have different resolutions.

24. The method of claim 21, wherein said video pipeline and said still image pipeline are separate hardware pipelines.