System and method for providing multi-initiator capability to an ATA drive

• US 6,961,813 B2
• Filed: 02/25/2003
• Issued: 11/01/2005
• Est. Priority Date: 06/21/2002
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Chang, Albert, Grieff, Thomas, Reif, James R.
• Primary Examiner(s): Verbrugge, Kevin
• Application Number:
  US10/373,969
• Publication Number:
  US 20030236953A1
• Time in Patent Office: 980 Days
• Field of Search: 711/112, 711/114, 711/151, 711/158, 710/40, 710/72, 710/74, 710/240, 710/244, 710/316
• US Class Current: 711/112
• CPC Class Codes: G06F 12/00 Accessing, addressing or allocating within memory systems or architectures digital input from, or digital output to record carriers, e.g. to disk storage units, G06F3/06
• CPC Class Codes: G06F 3/0607 by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0674 Disk device

Abstract

A multi-port adapter and method of operation suitable for use with serial ATA devices is disclosed. An adapter includes a switch that receives input from multiple host devices and an arbiter module for assigning a priority scheme to received commands. An outstanding request table is implemented as a memory module for storing identifying information associated with commands received from multiple host devices, and a free pointers queue is maintained to track slots available in the outstanding request table. A command tracker state machine decodes incoming requests from hosts, monitors the execution by these commands by the ATA device, and updates the memory module to reflect completion of commands. Also disclosed is a storage system including an adapter of the present invention and ATA storage devices.

Claims

1. An adapter for enabling multiple hosts to share access to a single parallel ATA device, comprising:

a switch for receiving commands from multiple hosts;

a memory module for storing identifying information associated with a received command;

an arbitration logic module operatively connected to the switch for assigning a priority scheme to received commands; and

a state machine that determines when a received command has been completed by the parallel ATA device and updates the memory module to indicate that the commend has been completed.

2. An adapter according to claim 1, wherein the switch includes an input for receiving commands from two hosts.

3. An adapter according to claim 1, wherein the memory module stores the original Tag associated with each outstanding command.

4. An adapter according to claim 3, wherein the memory module further stores information identifying the host that originated the command.

5. An adapter according to claim 4, wherein the memory module further stores information identifying the type of queued command.

6. An adapter according to claim 1, further comprising a pointer queue for indicating available spaces in the memory module.

7. An adapter according to claim 1, wherein the arbitration logic module implements a round-robin priority scheme.

8. An adapter according to claim 1, further comprising a first buffer for storing and decoding information received from a host.

9. An adapter according to claim 1, further comprising a second buffer for storing and decoding information received from the parallel ATA device.

10. An adapter according to claim 1, further comprising a third buffer for storing non-queued commands received from a host.

11. A method for enabling multiple hosts to share access to a single parallel ATA device, comprising:

receiving commands from a plurality of hosts;

storing identifying information associated with received commands in a memory module;

executing an arbitration scheme to assign a priority to received commands;

forwarding the received command having the highest priority to the parallel ATA device;

monitoring execution of the commands by the parallel ATA device; and

updating the memory module to reflect completion of a command.

12. A method according to claim 11, wherein storing identifying information includes storing the original Tag associated with each outstanding command.

13. A method according to claim 12, wherein storing identifying information includes storing information identifying the host that originated the command.

14. A method according to claim 12, wherein storing identifying information includes storing information identifying the type of queued command.

15. A method according to claim 11, wherein monitoring execution of the commands by the parallel ATA device includes decoding incoming ATA FIS'"'"'s passed up from a Link Layer state machines associated with each port.

16. A method according to claim 15, wherein monitoring execution of the commands by the parallel ATA device further includes detecting parallel ATA primitives that indicate the completion of FIS transmissions and receptions.

17. A storage module adaptable for use in a storage area network, comprising:

a plurality of host bus adapters that receive communication requests from one or more host computers;

a plurality of storage devices communicatively connected with the host bus adapters, wherein the plurality of storage devices includes an ATA disk drive; and

a dual port adapter connected to at least one ATA disk drive, such that the ATA disk drive can maintain communications with at least two host bus adapters.

18. The storage module of claim 17, further comprising a switch communicatively connected to the host bus adapters and the dual port adapters, wherein the switch routes communications from a host bus adapter to a dual port adapter.

19. The storage module of claim 18, further comprising a bus communicatively connected to the host bus adapter and the dual port adapters.

20. The storage module of claim 17, wherein the dual port adapter includes:

a switch for receiving commands from multiple hosts;

a memory module for storing identifying information associated with a received command;

an arbitration logic module operatively connected to the switch for assigning a priority scheme to received commands; and

a state machine that determines when a received command has been completed by the ATA disk drive and updates the memory module to indicate that the command has been completed.

21. The storage module of claim 17, wherein the ATA disk drive comprises a serial ATA disk drive or a parallel ATA disk drive.

22. A method for constructing a storage system, the method comprising:

communicatively connecting a first host bus adapter to a dual port adapter;

communicatively connecting a second host bus adapter to the dual port adapter; and

communicatively connecting at least one storage device to the dual port adapter, the at least one storage device comprising an ATA disk drive;

wherein the ATA disk drive is enabled to maintain communication with the first host bus adapter and the second host bus adapter via the dual port adapter.

23. The method of claim 22, further comprising:

communicatively connecting a switch between (i) the first host bus adapter and (ii) the dual port adapter and at least one other dual port adapter;

wherein the switch is capable of routing communications from the first host bus adapter to the dual port adapter and the at least one other dual port adapter.

24. The method of claim 23, further comprising:

communicatively connecting at least one other storage device to the at least one other dual port adapter.

25. The method of claim 22, wherein the three steps of communicatively connecting comprise at least one of:

connecting one or more communication links;

connecting one or more buses;

or

connecting at least one switched fabric.

26. The method of claim 22, wherein:

communicatively connecting a first host bus adapter to a dual port adapter comprises coupling the first host bus adapter to an arbiter of the dual port adapter; and

communicatively connecting a second host bus adapter to the dual port adapter comprises coupling the second host bus adapter to the arbiter of the dual port adapter;

wherein the arbiter is adapted to implement a priority scheme for commands that are received from the first host bus adapter and the second host bus adapter.

27. The method of claim 22, wherein the ATA disk drive comprises a serial ATA disk drive or a parallel ATA disk drive.

28. A storage system comprising:

a plurality of host bus adapters that are capable of receiving communication requests from one or more host computers;

a plurality of storage devices communicatively connected with the plurality of host bus adapters, wherein the plurality of storage devices includes at least one ATA device;

a switch adapted to receive commands from the plurality of host bus adapters;

memory adapted to store identifying information associated with each received command; and

arbitration logic operatively connected to the switch and adapted to assign a priority scheme to received commands;

wherein the at least one ATA device is capable of receiving the commands from the plurality of host bus adapters via the switch.

29. The storage system of claim 28, wherein the storage system comprises at least one storage module that is adaptable for use in a storage area network (SAN).

30. The storage system of claim 28, wherein the at least one ATA device comprises at least one serial ATA device or at least one parallel ATA device.

31. The storage system of claim 28, further comprising:

a state machine that is adapted to determine when a received command has been completed by the at least one ATA device and to update the memory to indicate that the received command has been completed.

32. The storage system of claim 31, wherein the switch, the memory, the arbitration logic, and the state machine comprise a dual port adapter that is communicatively connected to the at least one ATA device such that the at least one ATA device is capable of maintaining communications with the plurality of host bus adapters.

33. The storage system of claim 32, wherein the dual port adapter is adapted to assign a new tag for each command received from the plurality of host bus adapters and to use the newly-assigned tag in communications with the at least one ATA device.

34. The storage system of claim 32, wherein the dual port adapter is adapted to decode incoming ATA Frame information Structures (FISs) and to detect at least two serial ATA primitives comprising “

R_OK” and

“

R_ERR”

.

35. The storage system of claim 28, wherein the identifying information associated with each received command comprises information that identifies which host bus adapter of the plurality of host bus adapters originated the received command.

36. The storage system of claim 28, wherein the identifying information associated with each received command comprises information that identifies a type of queued command for each received command comprising a queued command.

37. The storage system of claim 28, wherein the identifying information associated with each received command comprises an original tag as sent by a host bus adapter of the plurality of host bus adapters that sent each received command.

38. The storage system of claim 28, further comprising:

a free pointers queue that is adapted to indicate one or more available spaces in the memory.

39. The storage system of claim 28, further comprising:

a first buffer that is capable of storing and decoding information received from at least one host bus adapter of the plurality of host bus adapters;

a second buffer that is capable of storing and decoding information received from the at least one ATA device; and

a third buffer that is capable of storing non-queued commands received from the at least one host bus adapter of the plurality of host bus adapters.