Programmable differential internal termination for a low voltage differential signal input or output buffer
First Claim
1. A configurable low voltage differential signal (LVDS) system located on a chip, the configurable LVDS system comprising:
- a pair of conductive terminals;
an LVDS transmitter for driving a differential output signal to the pair of terminals;
an LVDS receiver for receiving a differential input signal from the pair of terminals;
a termination resistor selectively coupled across the pair of terminals, wherein the termination resistor is selected via a control signal for use with either the LVDS transmitter or the LVDS receiver; and
a control circuit configured to selectively enable and disable the LVDS transmitter, the LVDS receiver and the termination resistor, wherein the control circuit is further configured to enable and disable one or more non-LVDS receivers, and in response to the control circuit enabling one of the one or more non-LVDS receivers, disabling the LVDS receiver and the LVDS transmitter.
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Accused Products
Abstract
A configurable low voltage differential signal (LVDS) system is located on a chip, such as a programmable logic device. The configurable LVDS system includes a pair of I/O pads, an LVDS transmitter for driving a differential output signal onto the I/O pads, an LVDS receiver for receiving a differential input signal from the I/O pads, and a termination resistor coupled across the pair of I/O pads, wherein the termination resistance can be enabled for use with either the LVDS transmitter or the LVDS receiver. Control circuitry is provided to control the selective enabling and disabling of the LVDS transmitter, the LVDS receiver and the termination resistance. This control circuitry can be configured in response to configuration data values stored on the chip.
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Citations
17 Claims
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1. A configurable low voltage differential signal (LVDS) system located on a chip, the configurable LVDS system comprising:
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a pair of conductive terminals; an LVDS transmitter for driving a differential output signal to the pair of terminals; an LVDS receiver for receiving a differential input signal from the pair of terminals; a termination resistor selectively coupled across the pair of terminals, wherein the termination resistor is selected via a control signal for use with either the LVDS transmitter or the LVDS receiver; and a control circuit configured to selectively enable and disable the LVDS transmitter, the LVDS receiver and the termination resistor, wherein the control circuit is further configured to enable and disable one or more non-LVDS receivers, and in response to the control circuit enabling one of the one or more non-LVDS receivers, disabling the LVDS receiver and the LVDS transmitter. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of implementing a configurable low-voltage differential signal (LVDS) system on a chip, the method comprising:
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selectively coupling an LVDS transmitter, an LVDS receiver, and a termination resistor to a pair of input/output (I/O) pads on the chip; and selectively decoupling the LVDS transmitter, the LVDS receiver, and the termination resistor in response to coupling a non-LVDS receiver to the pair of I/O pads on the chip. - View Dependent Claims (10, 11, 12)
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13. A configurable low voltage differential signal (LVDS) system located on a chip, the configurable LVDS system comprising:
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a pair of electrically conductive input/output (I/O) pads; an LVDS transmitter coupled to the pair of I/O pads; a termination resistor coupled to the pair of I/O pads; an LVDS receiver coupled to the pair of I/O pads; means for selectively enabling and disabling the LVDS transmitter, the LVDS receiver and the termination resistor; and at least one non-LVDS receiver coupled to the pair of I/O pads, wherein the at least one non-LVDS receiver is enabled in response to disabling the LVDS transmitter, the LVDS receiver and the termination resistor. - View Dependent Claims (14, 15)
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16. A configurable low voltage differential signal (LVDS) system located on a chip, the configurable LVDS system comprising:
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a pair of conductive terminals; an LVDS transmitter for driving a differential output signal to the pair of terminals; an LVDS receiver for receiving a differential input signal from the pair of terminals; and a termination resistor selectively coupled across the pair of terminals, wherein the termination resistor includes, a first transistor network selectively coupled via a first control signal; and a second transistor network selectively coupled in parallel to the first transistor network via a second control signal. - View Dependent Claims (17)
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Specification