Adaptively configurable class-A/class-B transmit DAC to transceiver emission and power consumption control

• US 6,963,616 B2
• Filed: 11/19/2003
• Issued: 11/08/2005
• Est. Priority Date: 10/30/1998
• Status: Expired due to Fees

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Chan, Kevin T.
• Primary Examiner(s): Bocure, Tesfaldet
• Application Number:
  US10/717,127
• Publication Number:
  US 20040105504A1
• Time in Patent Office: 720 Days
• Field of Search: 375/257, 375/258, 375/295, 327/108
• US Class Current: 375/257
• CPC Class Codes: H04B 3/23 using a replica of transmitted signal in the time domain, e.g. echo cancellers
• CPC Class Codes: H04B 3/32 Reducing cross-talk, e.g. by compensating
• CPC Class Codes: H04L 12/10 Current supply arrangements
• CPC Class Codes: H04L 25/0276 Arrangements for coupling common mode signals
• CPC Class Codes: H04L 25/0282 Provision for current-mode coupling
• CPC Class Codes: H04L 25/0286 Provision of wave shaping within the driver wave shaping per se H04L25/03834
• CPC Class Codes: H04L 25/03834 using pulse shaping
• CPC Class Codes: H04L 25/08 Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
• CPC Class Codes: H04L 25/14 Channel dividing arrangements , i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver

Abstract

A power efficient and reduced electromagnetic interference (EMI) emissions transmitter for unshielded twisted pair (UTP) data communication applications. Transmit data is processed by a digital filter. The digital filter output data is converted to a current-mode analog waveform by a digital-to-analog converter (DAC). The digital filter is integrated with the DAC binary decoder in a memory device such as a ROM with time multiplexed output. DAC line driver cells are adaptively configurable to operate in either a class-A or class-B mode depending on the desired operational modality. A discrete-time analog filter is integrated with the DAC line driver to provide additional EMI emissions suppression. An adaptive electronic transmission signal cancellation circuit separates transmit data from receive data in a bidirectional communication system operating in full duplex mode. For a multi-transmitter system, timing circuitry staggers the time base of each transmitter to reduce the aggregate EMI emissions of the multi-transmitter system.

Claims

1. A communication system including a differential signal transmitter, the transmitter comprising:

a DAC decoder circuit, the DAC decoder circuit outputting DAC control words corresponding to digital input signals;

a differential current mode driver cell array;

a selection circuit, the selection circuit asserting control signals in operative response to DAC control words, the selection circuit placing individual cells of the current driver cell array into a first operational mode sensitive to a first metric or into a second operational mode sensitive to a second metric in response to a select signal.

2. The communication system according to claim 1, wherein the first metric corresponds to radiative emissions and wherein the second metric corresponds to power consumption.

3. The communication system according to claim 2, each differential current mode driver cell comprising:

first and second current sources, each conducting an equal quanta of current;

first and second differential pairs, each pair coupled to a respective current source;

a pair of differential outputs, a first output connected to a first transistor comprising each of the differential pairs, a second output connected to a second transistor comprising each of the differential pairs; and

four control signal inputs, each input controlling to a respective one of the transistors comprising the first and second differential pairs.

4. The communication system according to claim 3, further comprising:

a first logic circuit connected to receive the DAC control word, the first logic circuit asserting control signals which operate a corresponding signal component output circuit in the first mode; and

a second logic circuit connected to receive the control word, the second logic circuit asserting control signals which operate a corresponding signal component output circuit in the second mode.

5. The communication system according to claim 4, each differential current mode driver cell comprising:

first and second current sources, each conducting an equal quanta of current;

first and second differential pairs, each pair coupled to a respective current source;

a pair of differential outputs, a first output connected to a first transistor comprising each of the differential pairs, a second output connected to a second transistor comprising each of the differential pairs; and

a set of control signal inputs, each input of the set controlling a respective one of the transistors comprising the first and second differential pairs.

6. The communication system according to claim 5, the first and second logic circuits each defining control signals in response to a DAC control word, said first and second differential pairs operatively responsive to said control signals to output a differential signal in either the first mode or the second mode.

7. The communication system according to claim 6, wherein the DAC control word is the same when the first and second differential pairs output a differential signal in either the first mode or the second mode.

8. The communication system according to claim 7, wherein the first mode is a Class-A mode and wherein the second mode is a Class-B mode.