Method and apparatus for fast automated failure classification for semiconductor wafers
First Claim
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1. A method for classifying patterns of failcodes on a semiconductor wafer, comprising the steps of:
- determining failcodes for chips on the wafer;
checking adjacent chips for each chip on the wafer having a failcode to determine a failcode pattern having a defined number of chips, wherein the step of checking comprises determining once for each chip having a failcode, adjacent chips having the same failcode, tracking adjacent chips having the same failcode, and determining a pattern of chips having the same failcode upon tracking a defined number of adjacent chips having the same failcode; and
outputting the failcode pattern to analyze the wafer.
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Abstract
A method for classifying patterns of failcodes on a semiconductor wafer, in accordance with the present invention, includes determining failcodes for chips on the wafer and checking adjacent chips for each chip on the wafer having a failcode to determine a failcode pattern having a defined number of chips.
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Citations
15 Claims
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1. A method for classifying patterns of failcodes on a semiconductor wafer, comprising the steps of:
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determining failcodes for chips on the wafer;
checking adjacent chips for each chip on the wafer having a failcode to determine a failcode pattern having a defined number of chips, wherein the step of checking comprises determining once for each chip having a failcode, adjacent chips having the same failcode, tracking adjacent chips having the same failcode, and determining a pattern of chips having the same failcode upon tracking a defined number of adjacent chips having the same failcode; and
outputting the failcode pattern to analyze the wafer. - View Dependent Claims (2, 3, 4)
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5. A method for classifying patterns of failcodes on a semiconductor wafer, comprising steps of:
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providing failure information from a wafer tester;
determining failcodes for chips on the water by employing the failure information, checking adjacent chips for each chip on the wafer to determine if the adjacent chips have a same failcode;
determining a pattern of chips having the same failcode upon tracking a defined number of chips; and
outputting the failcode pattern to analyze the wafer. - View Dependent Claims (6, 7, 8, 9, 10)
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11. A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform method steps for classifying patterns of failcodes on a semiconductor wafer, the method steps comprising:
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determining failcodes for chips on the wafer;
checking adjacent chips for each chip on the wafer having a failcode to determine a failcode pattern having a defined number of chips, wherein the step of checking comprises determining once for each chip having a failcode, adjacent chips having the same failcode, tracking adjacent chips having the same failcode, and determining a pattern of chips having the same failcode upon tracking a defined number of adjacent chips having the same failcode; and
outputting the failcode pattern to analyze the wafer. - View Dependent Claims (12, 13, 14)
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15. A computer program product comprising a computer usable medium having a computer readable program code embodied therein for a recursive classification of semiconductor wafers, the computer readable program code in the computer program product comprising:
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computer readable program code for causing a computer to determine whether a chip on the wafer has a pass or a failcode;
computer readable program code for causing the computer to determine a characteristic failcode for each chip having a failcode;
computer readable program code for causing the computer to add a first chip to a temporary array, if the first chip has a failcode, computer readable program code for causing the computer to determine adjacent chips having the same failcode as the first chip;
computer readable program code for causing the computer to add an adjacent second chip having the same failcode to the temporary array; and
computer readable program code for causing the computer to classify the temporary array of chips having the same failcode as a pattern upon identifying at least a predefined number of chips in the temporary array.
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Specification