High speed bus topology for expandable systems

• US 6,963,941 B1
• Filed: 05/31/2000
• Issued: 11/08/2005
• Est. Priority Date: 05/31/2000
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Lee, Terry R.
• Primary Examiner(s): Vo, Tim
• Assistant Examiner(s): Huynh, Kim T.
• Application Number:
  US09/583,883
• Time in Patent Office: 1,987 Days
• Field of Search: 710/2, 710301-304, 710/200, 710/107, 309/9, 309/250, 370/255, 370/362, 370/466, 370/35.4, 439/61, 361/788, 361775-778, 361796-797, 361/360, 361/63, 361/364, 361/735, 365/63
• US Class Current: 710/107
• CPC Class Codes: G06F 13/4095 in incremental bus architectures, e.g. bus stacks
• CPC Class Codes: H05K 1/14 Structural association of two or more printed circuits providing electric connection to or between printed circuits H05K1/11, H01R12/00
• CPC Class Codes: H05K 1/145 Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules
• CPC Class Codes: H05K 2201/044 Details of backplane or midplane for mounting orthogonal PCBs

Abstract

A high-speed short-loop bus topology that routes the bus into a first expansion connector and out of a first expansion card inserted within the connector is disclosed. The bus is not routed out of the first expansion connector. Instead, the bus is routed from the first expansion card into a second expansion card by a jumper mechanism. The bus is routed through the second expansion card and out of a second expansion connector housing the second expansion card, where the bus can be terminated or routed into another expansion connector having another expansion card. By routing the bus in this manner, it is shorter than prior art buses found in loop-through bus systems and capable of substantially maintaining a uniform transmission line impedance. Moreover, the operating bandwidth of the short-loop bus is increased since the bus is short and does not have stubs or signal reflections.

Claims

1. A method of routing a system bus to a plurality of expansion cards, said method comprises the acts of:

routing the bus into a first connector on a motherboard of the system and into a first circuit card residing within the first connector;

routing the bus from a portion of the first circuit card into a portion of a second circuit card residing within a second connector on the motherboard, wherein the bus is routed from the first circuit card to the second circuit card without entering the second connector; and

routing the bus through the second circuit card to the second connector.

2. The method of claim 1 further comprising the acts of:

routing the bus into a third connector and into a third circuit card residing within the third connector;

routing the bus from a portion of the third circuit card into a portion of a fourth circuit card residing within a fourth connector, wherein the bus is routed from the third circuit card to the fourth circuit card without entering the fourth connector;

routing the bus through the fourth circuit card to the fourth connector; and

routing the bus out of the fourth connector.

3. The method of claim 1 further comprising the acts of:

routing the bus into a third connector and into a third circuit card residing within the third connector; and

routing the bus from a portion of the third circuit card into a portion of the motherboard.

4. The method of claim 1 further comprising the act of routing the bus out of the second connector into a portion of the motherboard.

5. The method of claim 4 further comprising the act of terminating the bus after routing the bus out of the second connector.

6. The method of claim 1 wherein the first and second circuit cards each contain a top edge portion, each top edge portions being opposite an edge portion residing in a respective connector, and wherein the bus is routed from the top edge portion of the first circuit card into the top edge portion of the second circuit card.

7. The method of claim 1 wherein the first and second circuit cards each contain a top edge portion, each top edge portions being opposite a bottom edge portion residing in a respective connector, and wherein the bus is routed from a portion between the top and bottom edges of the first circuit card into a portion between the top and bottom edges of the second circuit card.

8. The method of claim 1 wherein said act of routing the bus from the portion of the first circuit card into the portion of the second circuit card comprises connecting the portion of the first circuit card to the portion of the second circuit card by a jumper mechanism.

9. The method of claim 1 wherein said act of routing the bus from the portion of the first circuit card into the portion of the second circuit card comprises connecting the portion of the first circuit card to the portion of the second circuit card by a circuit board having bus portion traces for continuing the bus between the first and second circuit cards.

10. The method of claim 1 wherein said act of routing the bus from the portion of the first circuit card into the portion of the second circuit card comprises connecting the portion of the first circuit card to the portion of the second circuit card by a cable.

11. The method of claim 1 wherein at least address, data and control signals are routed on said bus between the first and second circuit cards.

12. The method of claim 11 wherein only address, data and control signals are routed on said bus between the first and second circuit cards.

13. The method of claim 1 wherein address, data, control and power signals are routed on said bus between the first and second circuit cards.

14. A method of routing a system bus to a plurality of expansion cards provided on a motherboard of the system, said method comprises the acts of:

routing the bus into a first circuit card residing within a first slot on the motherboard;

routing the bus from a portion of the first circuit card into a portion of a second circuit card residing within a second slot on the motherboard, wherein the bus is routed from the first circuit card to the second circuit card without entering the second slot; and

routing the bus through the second circuit card.

15. The method of claim 14 further comprising the acts of:

routing the bus into a third circuit card residing within a third slot;

routing the bus from a portion of the third circuit card into a portion of a fourth circuit card residing within a fourth slot, wherein the bus is routed from the third circuit card to the fourth circuit card without entering the fourth slot; and

routing the bus through and out of the fourth circuit card.

16. The method of claim 14 further comprising the acts of:

routing the bus into a third circuit card residing within a third slot; and

routing the bus from a portion of the third circuit card into a portion of the motherboard.

17. The method of claim 14 further comprising the act of routing the bus out of the second slot.

18. The method of claim 17 further comprising the act of terminating the bus after routing the bus near either or both ends of the bus.

19. The method of claim 14 wherein the first and second circuit cards each contain a top edge portion, each top edge portions being opposite an edge portion residing in a respective slot, and wherein the bus is routed from the top edge portion of the first circuit card into the top edge portion of the second circuit card.

20. The method of claim 14 wherein the first and second circuit cards each contain a top edge portion, each top edge portions being opposite a bottom edge portion residing in a respective slot, and wherein the bus is routed from a portion between the top and bottom edges of the first circuit card into a portion between the top and bottom edges of the second circuit card.

21. The method of claim 14 wherein said act of routing the bus from the portion of the first circuit card into the portion of the second circuit card comprises connecting the portion of the first circuit card to the portion of the second circuit card by a jumper mechanism.

22. The method of claim 14 wherein said act of routing the bus from the portion of the first circuit card into the portion of the second circuit card comprises connecting the portion of the first circuit card to the portion of the second circuit card by a circuit board having bus portion traces for continuing the bus between the first and second circuit cards.

23. The method of claim 14 wherein said act of routing the bus from the portion of the first circuit card into the portion of the second circuit card comprises connecting the portion of the first circuit card to the portion of the second circuit card by a cable.

24. The method of claim 14 wherein at least address, data and control signals are routed between the first and second circuit cards.

25. The method of claim 24 wherein only address, data and control signals are routed on said bus between the first and second circuit cards.

26. The method of claim 14 wherein address, data, control and power signals are routed on said bus between the first and second circuit cards.

27. The method of claim 14 wherein the bus is routed into the first circuit card by routing the bus into a first connector in which the first circuit card is residing.

28. The method of claim 14 wherein the bus is routed out of the second circuit card by routing the bus out into a second connector in which the second circuit card is residing.

29. The method of claim 14 wherein a first portion of bus signals are routed between the first and second circuit cards and a second portion of bus signals are provided to the second circuit card from the motherboard.

30. A bus system comprising:

a bus mounted on a circuit board of said system; and

a plurality of expansion slots, each slot comprising a connector mounted on said circuit board and a circuit card residing within the connectors wherein said bus is routed into a first connector, into a first circuit card residing within said first connector, out of a portion of said first circuit card into a portion of a second circuit card residing within a second connector and through said second circuit card, and wherein said bus is routed from said first circuit card to said second circuit card without entering said second connector.

31. The system of claim 30 further comprising:

a third connector having a third circuit card residing therein; and

a fourth connector having a fourth circuit card residing therein, wherein said bus is further routed into said third connector to said third circuit card, out of a portion of said third circuit card into a portion of said fourth circuit, through said fourth circuit card and out of said fourth connector, and wherein said bus is routed from said third circuit card to said fourth circuit card without entering said fourth connector.

32. The system of claim 30 further comprising a third connector having a third circuit card residing therein, wherein said bus is further routed into said third connector to said third circuit card, out of a portion of said third circuit card and into a portion of said system circuit board.

33. The system of claim 30 wherein said bus is terminated by a plurality of resistors.

34. The system of claim 30 further comprising a jumper mechanism connected between said portions of said first and second circuit cards, said jumper mechanism for routing said bus between said first and second circuit cards.

35. The system of claim 34 wherein said portions are located at a top edge of said first and second circuit cards opposite a bottom edge residing in said connectors.

36. The system of claim 34 wherein said first and second circuit cards each contain a top edge portion, each top edge portions being opposite a bottom edge portion residing in a respective connector, and wherein said bus is routed from a portion between said top and bottom edges of said first circuit card into a portion between said top and bottom edges of said second circuit card.

37. The system of claim 34 wherein said jumper mechanism comprises:

a circuit board having bus portion traces configured for continuing said bus between said first and second circuit cards; and

a plurality of connectors coupled to said circuit board, at least one connector adapted to receive said portion of said first circuit card and at least one other connector adapted to receive said portion of said second circuit card.

38. The system of claim 34 wherein said jumper mechanism comprises:

a cable configured for continuing said bus between said first and second circuit cards; and

a plurality of connectors coupled to said cable, at least one connector adapted to receive said portion of said first circuit card and at least one other connector adapted to receive said portion of said second circuit card.

39. The system of claim 38 wherein said cable is a ribbon cable.

40. The system of claim 38 wherein said cable is a ribbon cable with a shield.

41. The system of claim 38 wherein said cable is a coaxial cable.

42. The system of claim 38 wherein said cable is a twisted pair wiring.

43. The system of claim 38 wherein said cable is a waveguide.

44. The system of claim 30 wherein said circuit cards are dynamic random access memory circuit cards and said system further comprises a memory controller coupled to said bus.

45. A bus system comprising:

a bus mounted on a circuit board of said system; and

a plurality of expansion slots mounted on said circuit board, wherein said bus is routed into a first circuit card residing within a first slot, out of a portion of said first circuit card and into a portion of a second circuit card residing within a second slot and out of the second circuit card, wherein said bus is routed from said first circuit card to said second circuit card without entering said second slot.

46. The system of claim 45 further comprising:

a third slot having a third circuit card residing therein; and

a fourth slot having a fourth circuit card residing therein, wherein said bus is further routed into said third circuit card, out of a portion of said third circuit card and into a portion of said fourth circuit, and out of said fourth circuit card, wherein said bus is routed from said third circuit card to said fourth circuit card without entering said fourth slot.

47. The system of claim 45 further comprising a third slot having a third circuit card residing therein, wherein said bus is further routed into said third circuit card, out of a portion of said third circuit card and into a portion of said system circuit board.

48. The system of claim 45 wherein said bus is terminated by a plurality of resistors.

49. The system of claim 45 further comprising a jumper mechanism connected between said portions of said first and second circuit cards, said jumper mechanism for routing said bus between said first and second circuit cards.

50. The system of claim 49 wherein said portions are located at a top edge of said first and second circuit cards, said top edges being opposite respective bottom edges residing in associated slots.

51. The system of claim 49 wherein said portions are located between top and bottom edges of said cards, said top edges are opposite respective ones of said bottom edges, said bottom edges residing with a respect slot.

52. The system of claim 49 wherein said jumper mechanism comprises:

a circuit board having bus portion traces configured for continuing said bus between said first and second circuit cards; and

a plurality of connectors coupled to said circuit board, at least one connector adapted to receive said portion of said first circuit card and at least one other connector adapted to receive said portion of said second circuit card.

53. The system of claim 49 wherein said jumper mechanism comprises:

a cable configured for continuing said bus between said first and second circuit cards; and

a plurality of connectors coupled to said cable, at least one connector adapted to receive said portion of said first circuit card and at least one other connector adapted to receive said portion of said second circuit card.

54. The system of claim 53 wherein said cable is a ribbon cable.

55. The system of claim 53 wherein said cable is a ribbon cable with a shield.

56. The system of claim 53 wherein said cable is a coaxial cable.

57. The system of claim 53 wherein said cable is a twisted pair wiring.

58. The system of claim 53 wherein said cable is a waveguide.

59. The system of claim 45 wherein said circuit cards are dynamic random access memory circuit cards and said system further comprises a memory controller coupled to said bus.

60. A processor-based system comprising:

a processor; and

a bus system coupled to said processor;

said bus system comprising;

a bus mounted on a circuit board of said system; and

a plurality of expansion slots, each slot comprising a connector mounted on said circuit board and a circuit card residing within the connector, wherein said bus is routed into a first connector, into a first circuit card residing within said first connector, out of a portion of said first circuit card into a portion of a second circuit card residing within a second connector, through said second circuit card and out of said second connector, wherein said bus is routed from said first circuit card into said second circuit card without entering said second connector.

61. A processor-based system comprising:

a processor; and

a bus system coupled to said processor;

said bus system comprising;

a bus mounted on a circuit board of said system; and

a plurality of expansion slots mounted on said circuit board, wherein said bus is routed into a first circuit card residing within a first slot, out of a portion of said first circuit card and into a portion of a second circuit card residing within a second slot and out of the second circuit card, wherein said bus is routed from said first circuit card into said second circuit card without entering said second slot.

62. A processor-based system comprising:

a processor; and

a memory bus system coupled to said processor;

said bus system comprising;

a bus mounted on a circuit board of said system; and

a plurality of expansion slots mounted on said circuit board, wherein said bus is routed into a first memory circuit card residing within a first slot, out of a portion of said first memory circuit card and into a portion of a second memory circuit card residing within a second slot, and out of the second memory circuit card, wherein said bus is routed from said first memory circuit card into said second memory circuit card without entering said second slot.