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Cryptographic accelerator

  • US 6,963,979 B2
  • Filed: 04/11/2002
  • Issued: 11/08/2005
  • Est. Priority Date: 10/20/1999
  • Status: Expired due to Fees
First Claim
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1. A cryptographic accelerator comprising:

  • a host interface for interfacing with a host system to receive requests for cryptographic operations and to route responses to the host system;

    a plurality of logical units including an exponentiation sub-system;

    a CPU connected between the host interface and the logical units for managing operation of the logical units;

    said exponentiation sub-system including, a plurality of exponentiation groups, each group having a plurality of modular exponentiators interconnected in series that define a size of each group, each exponentiator being capable of performing a multiply operation;

    an input buffer for the exponentiation groups; and

    a scheduler for delivering control instructions to the input buffer to dynamically configure the exponentiators so that they are dynamically and serially chained together within the groups, each chain having a number of exponentiators up to the size of the exponentiation groups to form at least one chain in each group.

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