Method of fabricating a transistor on a substrate to operate as a fully depleted structure
First Claim
1. A method of fabricating a transistor on a substrate, the method comprising:
- forming a first source/drain region on the substrate;
vertically forming a body region on the first source/drain region as a fully depleted structure, forming a second source/drain region on the body region to form a column on the substrate, the body region having opposing sidewall surfaces on the column;
forming a first gate on a first one of the opposing sidewall surfaces after forming the column, the first gate separated from the first one of the opposing sidewall surfaces by a first oxide layer; and
forming a second gate on a second one of the opposing sidewall surfaces after forming the column, the second gate separated from the second one of the opposing sidewall surfaces by a second oxide layer, wherein vertically forming the body region includes vertically growing an epitaxial layer such that the body region is formed having a width and a doping concentration such that a threshold voltage is substantially independent of bulk charge in the body region in transistor operation.
1 Assignment
0 Petitions
Accused Products
Abstract
A method provides a structure that includes dual-gated metal-oxide semiconducting field effect transistor (MOSFET). The dual-gated MOSFET can be fabricated according to current CMOS processing techniques. The method includes forming a body region of the dual-gated MOSFET as a fully depleted structure. The structure includes two gates which are positioned on opposite sides of the opposing sides of the body region. Further, the structure operates as one device where the threshold voltage of one gate depends on the bias of the other gate. Thus, the structure yields a small signal component in analog circuit applications which depends on the product of the signals applied to the gates, and not simply one which depends on the sum of the two signals.
-
Citations
38 Claims
-
1. A method of fabricating a transistor on a substrate, the method comprising:
-
forming a first source/drain region on the substrate;
vertically forming a body region on the first source/drain region as a fully depleted structure, forming a second source/drain region on the body region to form a column on the substrate, the body region having opposing sidewall surfaces on the column;
forming a first gate on a first one of the opposing sidewall surfaces after forming the column, the first gate separated from the first one of the opposing sidewall surfaces by a first oxide layer; and
forming a second gate on a second one of the opposing sidewall surfaces after forming the column, the second gate separated from the second one of the opposing sidewall surfaces by a second oxide layer, wherein vertically forming the body region includes vertically growing an epitaxial layer such that the body region is formed having a width and a doping concentration such that a threshold voltage is substantially independent of bulk charge in the body region in transistor operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A method of fabricating a transistor on a substrate, the method comprising:
-
forming a first source/drain region on the substrate;
vertically forming a body region on the first source/drain region;
forming a second source/drain region on the body region to form a column on the substrate, the body realon having opposing sidewall surfaces on the column;
forming a first gate on a first one of the opposing sidewall surfaces after forming the column, the first gate separated from the first one of the opposing sidewall surfaces by a first oxide layer; and
forming a second gate on a second one of the opposing sidewall surfaces after forming the column, the second gate separated from the second one of the opposing sidewall surfaces by a second oxide layer, wherein vertically forming the body region includes vertically growing an epitaxial layer such that the body region is formed as a single crystalline structure having a width and a doping concentration such that a threshold voltage of the transistor is substantially independent of bulk charge in the body region in transistor operation, and the body region, the first gate, and the second gate are formed such that biasing the first and the second gates fully depletes the body region. - View Dependent Claims (12)
-
-
13. A method of fabricating a transistor on a substrate, the method comprising:
-
forming a first conductivity type first source/drain region on the substrate;
vertically forming a second conductivity type body region on the first source/drain layer, forming a first conductivity type second source/drain region on the body region layer to form a column on the substrate, the body region having opposing sidewall surfaces on the column;
forming a first gate on a first one of the opposing sidewall surfaces after forming the column, the first gate separated from the first one of the opposing sidewall surfaces by a first oxide layer; and
forming a second gate on a second one of the opposing sidewall surfaces after forming the column, the second gate separated from the second one of the opposing sidewall surfaces by a second oxide layer, wherein vertically forming the body region includes vertically growing an epitaxial layer such that the body region is formed as a fully depleted structure with a single crystalline structure having a width and a doping concentration such that a threshold voltage of the transistor is substantially independent of bulk charge in the body region in transistor operation. - View Dependent Claims (14, 15, 16, 17)
-
-
18. A method of fabricating a transistor on a substrate, the method comprising:
-
vertically growing an n-type epitaxial first source/drain region on the substrate;
vertically forming a second conductivity type body region on the first source/drain layer as a fully depleted structure;
vertically growing an n-type epitaxial second source/drain region on the body region layer to form a column on the substrate, the body region having opposing sidewall surfaces on the column;
forming a first gate on a first one of the opposing sidewall surfaces after forming the column, the second gate separated from the first one of the opposing sidewall surfaces by a first oxide layer; and
forming a second gate on a second one of the opposing sidewall surfaces after forming the column, the second gate separated from the second one of the opposing sidewall surfaces by a second oxide layer, wherein vertically forming the body region includes vertically growing an epitaxial layer such that the body region is formed as a fully depleted structure with a single crystalline structure having a width and a doping concentration such that a threshold voltage is substantially independent of bulk charge in the body region in transistor operation. - View Dependent Claims (19)
-
-
20. A method of fabricating a transistor on a substrate, the method comprising:
-
forming an isolated vertical device region extending outwardly from the substrate, the isolated vertical device region formed as a region of semiconductor material;
forming a body region in the vertical device region extending outwardly from the substrate, wherein vertically forming the body region includes forming the body region with opposing sidewall surfaces;
forming a first source/drain region adjacent to the body region;
forming a second source/drain region adjacent to the body region;
forming a first gate on a first one of the opposing sidewall surfaces separated from the first one of the opposing sidewall surfaces by a first oxide layer; and
forming a second gate on a second one of the opposing sidewall surfaces separated from the second one of the opposing sidewall surfaces by a second oxide layer, the body region, the first and second source/drain regions, and the first and second gates being formed after forming the isolated vertical device region, wherein vertically forming the body region includes forming the body region as a fully depleted structure with a single crystalline structure having a width and a doping concentration such that a threshold voltage is substantially independent of bulk charge in the body region in transistor operation. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27)
-
-
28. A method of fabricating a transistor on a substrate, the method comprising:
-
forming an isolated vertical device region extending outwardly from the substrate, the isolated vertical device region formed as a region of semiconductor material;
vertically forming a body region in the vertical device region extending outwardly from the substrate, and wherein vertically forming the body region includes forming the body region with opposing sidewall surfaces;
forming a first source/drain region adjacent to the body region, wherein forming the first source/drain region adjacent to the body region includes encasing a portion of the body region with Arsenic silicate glass (ASG) and annealing the ASG;
forming a second source/drain region adjacent to the body region, wherein forming the second source/drain region adjacent to the body region includes encasing a portion of the body region with Arsenic silicate glass (ASG) and annealing the ASG;
forming a first gate on a first one of the opposing sidewall surfaces separated from the first one of the opposing sidewall surfaces by a first oxide layer; and
forming a second gate on a second one of the opposing sidewall surfaces separated from the second one of the opposing sidewall surfaces by a second oxide layer, the body region, the first and second source/drain regions, and the first and second gates being formed after forming the isolated vertical device region, wherein vertically forming the body region includes forming the body region as a fully depleted structure with a single crystalline structure having a width and a doping concentration such that a threshold voltage is substantially independent of bulk charge in the body region in transistor operation. - View Dependent Claims (29, 30, 31)
-
-
32. A method of forming a dual-gated transistor on a substrate, comprising:
-
forming a first source/drain region on the substrate;
vertically forming a body region with a fully depleted structure on the first source/drain region, forming a second source/drain region on the body region to form a column on the substrate;
forming a first gate on a first one of opposing sidewall surfaces of the body region after forming the column, the first gate separated from the first one of the opposing sidewall surfaces by a first oxide layer; and
forming a second gate on a second one of the opposing sidewall surfaces after forming the column, the second gate separated from the second one of the opposing sidewall surfaces by a second oxide layer, wherein vertically farming the body region includes vertically growing an epitaxial layer such that the body region is formed as a single crystalline structure having a width and a doping concentration such that a threshold voltage for the transistor depends only on a thickness of the first and second oxides and the width of the body region. - View Dependent Claims (33, 34, 35, 36, 37, 38)
-
Specification