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Top layers of metal for high performance IC's

  • US 6,965,165 B2
  • Filed: 03/14/2003
  • Issued: 11/15/2005
  • Est. Priority Date: 12/21/1998
  • Status: Expired due to Term
First Claim
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1. A semiconductor device structure comprising:

  • a semiconductor substrate comprising semiconductor devices;

    an interconnecting metalization structure connected to said devices;

    electrical contact points on an upper surface of said interconnecting metalization structure and connected to said interconnecting metalization structure;

    a passivation layer deposited over said interconnecting metalization structure and over said electrical contact points;

    an insulating layer deposited over said passivation layer said insulating layer being substantially thicker than said passivation layer;

    openings through said insulating layer and through said passivation layer down to the upper surface of said electrical contact points;

    metal conductors within said openings; and

    an upper metalization structure connected to said metal conductors.

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