Regulated cascode amplifier with controlled saturation

• US 6,965,270 B1
• Filed: 12/18/2003
• Issued: 11/15/2005
• Est. Priority Date: 12/18/2003
• Status: Active Grant

• Current Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Original Assignee: Xilinx, Inc. (Advanced Micro Devices, Inc.)
• Inventors: Ross, James P.
• Primary Examiner(s): Nguyen, Patricia
• Application Number:
  US10/741,969
• Time in Patent Office: 698 Days
• Field of Search: 330/311, 330/291, 330/296
• US Class Current: 330/311
• CPC Class Codes: H03F 1/223 with MOSFET's

Abstract

Described are regulated cascode amplifiers with improved low-voltage performance. The improved amplifier is similar to conventional regulated cascode amplifiers, including a cascode circuit and a feedback amplifier. The cascode circuit conventionally includes two output transistors, the first of which preferably remains in saturation to provide a relatively stable output resistance over a range of output voltages. A booster circuit in accordance with one embodiment maintains the first transistor of the cascode circuit in saturation over a broader range of output voltages, and consequently extends the low-end of the operating range of the cascode amplifier.

Claims

1. An amplifier connected between first and second power supply terminals, the amplifier comprising:

a. an amplifier input terminal;

b. an amplifier output terminal;

c. a feedback amplifier having

i. a bias terminal receiving a first bias voltage;

ii. first and second feedback terminals; and

iii. a feedback-amplifier terminal;

d. a cascode circuit including;

i. an input transistor having a first current-carrying terminal connected to the first feedback terminal, a second current-carrying terminal connected to the second supply terminal, and a control terminal connected to the amplifier input terminal; and

ii. a output transistor having a first current-carrying terminal connected to the amplifier output terminal, a second current-carrying terminal connected to the first feedback terminal, and a control terminal connected to the second feedback terminal; and

e. a booster circuit connected between the feedback-amplifier terminal and the second power supply terminal, the booster circuit configured to generate a booster voltage on the feedback-amplifier terminal sufficient to bias the input transistor in a saturation mode.

2. The amplifier of claim 1, wherein the booster circuit comprises a booster transistor having a first current-carrying terminal connected to the second power-supply terminal, a second current-carrying terminal, and a gate connected to the first feedback terminal.

3. The amplifier of claim 2, wherein a minimum voltage of the first feedback terminal is substantially equivalent to the booster voltage.

4. The amplifier of claim 1, wherein the feedback amplifier provides a negative feedback to the cascode circuit in response to a voltage change on the amplifier output terminal.

5. The amplifier of claim 4, wherein the feedback amplifier provides the negative feedback to the cascode circuit via the second feedback terminal.

6. The amplifier of claim 1, wherein the booster circuit includes a booster transistor having a first current carrying terminal connected to the feedback-amplifier terminal, a second current-carrying terminal connected to the second power supply terminal, and a control terminal, wherein the booster transistor is biased to operate in a triode mode.

7. The amplifier of claim 6, wherein the feedback amplifier transmits a booster voltage on the feedback-amplifier terminal to the first current-carrying terminal of the input transistor.

8. The amplifier of claim 6, wherein the booster voltage is substantially equivalent to the saturation voltage of the input transistor.

9. The amplifier of claim 6, wherein the feedback amplifier further includes a feedback-amplifier bias terminal connected to the control terminal of the booster transistor.

10. The amplifier of claim 1, further comprising a level-shifter connected between the first feedback terminal and the booster circuit.

11. The amplifier of claim 1, wherein the feedback amplifier includes:

a. an amplifier transistor having a first current-carrying terminal connected to the second feedback terminal, a second current-carrying terminal connected to the feedback-amplifier terminal, and a control terminal;

b. a first current sourcing transistor having a first current-carrying terminal connected to the first power supply terminal, a second current-carrying terminal connected to the second feedback terminal, and a control terminal connected to the bias terminal;

c. a diode-connected transistor having first current-carrying and control terminals connected together, and a second current-carrying terminal connected to the first feedback terminal; and

d. a second current-sourcing transistor having a first current-carrying terminal connected to the first power supply terminal, a second current-carrying terminal connected to the first current-carrying terminal of the diode-connected transistor, and a control terminal connected to the bias terminal.

12. The amplifier of claim 11, wherein the amplifier input terminal receives a constant bias voltage and the input transistor converts the constant bias voltage into an output current.

13. The amplifier of claim 11, wherein the amplifier employs negative feedback to maintain a relatively constant output voltage.

14. The amplifier of claim 1, wherein the amplifier is a current mirror.

15. The amplifier of claim 1, wherein the amplifier is a voltage amplifier.

16. The amplifier of claim 1, wherein the booster circuit includes a resistor.

17. A circuit comprising:

a. a bias terminal;

b. an input terminal;

c. an output terminal;

d. a first transistor having a first current-carrying terminal, a second current-carrying terminal, and a control terminal;

e. a second transistor having a first current-carrying terminal connected to a first power supply terminal, a second current-carrying terminal connected to the first current-carrying terminal of the first transistor, and a control terminal connected to the bias terminal;

f. a third transistor having a first current-carrying terminal, a second current-carrying terminal, a control terminal connected to the control terminal of the first transistor;

g. a fourth transistor having a first current-carrying terminal connected to the first power supply terminal, a second current-carrying terminal connected to the first current-carrying terminal of the third transistor and the control terminal of the first transistor, and a control terminal connected to the control terminal of the second transistor;

h. a fifth transistor having a first current-carrying terminal connected to the output terminal, a second current-carrying terminal connected to the second current-carrying terminal of the third transistor, and a control terminal connected to the first current-carrying terminal of the first transistor;

i. a sixth transistor having a first current-carrying terminal connected to the second current-carrying terminal of the fifth transistor, a second current-carrying terminal connected to a second power supply terminal, and control terminal connected to the input terminal; and

j. a bias circuit having a voltage at the second current-carrying terminal of the first transistor which is sufficient to bias the sixth transistor in a saturation mode.

18. The circuit of claim 17, wherein the bias circuit is a seventh transistor or a resistor, wherein the seventh transistor comprises a first current-carrying terminal connected to the second current-terminal of the first transistor, a second current-current-carrying transistor connected to the second power supply terminal and a control terminal connected to the control terminal of the first transistor.

19. The circuit of claim 17, wherein the circuit is a current multiplier converting the input voltage into an output current and providing the output current on the output terminal.

20. The circuit of claim 17, wherein the circuit is a voltage amplifier.

21. A circuit connected between first and second power supply terminals, the circuit comprising:

a. an amplifier input terminal;

b. an amplifier output terminal;

c. a feedback amplifier having;

i. a bias terminal receiving a first bias voltage;

ii. first and second feedback terminals; and

iii. first and second feedback-amplifier terminals;

d. a cascode circuit including;

i. an input transistor having a first current-carrying terminal connected to the first feedback terminal, a second current-carrying terminal connected to the second power supply terminal, and a control terminal connected to the amplifier input terminal; and

ii. a output circuit having a first current-carrying terminal connected to the amplifier output terminal, a second current-carrying terminal connected to the first feedback terminal, and a control terminal connected to the second feedback terminal; and

e. a voltage boosting means connected between the first and second feedback-amplifier terminals and the second power supply terminal, the voltage boosting means providing and maintaining a saturation voltage across the input transistor.

22. The circuit of claim 21, wherein the voltage boosting means comprises a booster transistor having a first current-carrying terminal connected to the first feed-amplifier terminal, a second current-carrying terminal connected to the second power supply terminal, and a control terminal connected to the second feedback-amplifier terminal.