Compact active pixel with low-noise snapshot image formation
First Claim
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1. An active pixel sensor circuit comprising:
- a photodetector;
a reset transistor connected between the photodetector and a first bus;
a snapshot transistor having a node connected to the photodetector;
a driver transistor connected to a row driver bus and the snapshot transistor;
a row driver circuit connected to the row driver bus;
an isolation transistor connected between the driver transistor and a column bus; and
a column buffer connected to the column bus;
wherein the transistors are MOSFETs and a tapered reset signal is applied to the reset transistor in order to reset the photodetector, and wherein during a reset operation, the row driver circuit grounds the driver transistor such that at least a portion of the column buffer acts as a current source for a feedback amplifier formed by the driver transistor, isolation transistor, and the column buffer.
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Abstract
A low-noise active pixel circuit is disclosed that efficiently suppresses reset (kTC) noise by using a compact preamplifier consisting of a photodetector and only four MOSFETs of identical polarity, in conjunction with ancillary circuits located on an imager'"'"'s periphery. The supporting circuits help the simplified pixel circuit to synchronously acquire (i.e., take a snapshot) an image across an imaging array, read the signal with low noise, and efficiently reset the pixel with low noise.
52 Citations
12 Claims
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1. An active pixel sensor circuit comprising:
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a photodetector; a reset transistor connected between the photodetector and a first bus; a snapshot transistor having a node connected to the photodetector; a driver transistor connected to a row driver bus and the snapshot transistor; a row driver circuit connected to the row driver bus; an isolation transistor connected between the driver transistor and a column bus; and a column buffer connected to the column bus; wherein the transistors are MOSFETs and a tapered reset signal is applied to the reset transistor in order to reset the photodetector, and wherein during a reset operation, the row driver circuit grounds the driver transistor such that at least a portion of the column buffer acts as a current source for a feedback amplifier formed by the driver transistor, isolation transistor, and the column buffer. - View Dependent Claims (2, 3, 4, 5)
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6. A CMOS imager array circuit comprising:
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a photodetector; a reset MOSFET having a source connected to the photodetector, a gate connected to a reset input signal, and a drain connected to a first bus; a snapshot MOSFET having a source connected to the photodetector and a gate connected to a snapshot signal; a driver MOSFET having a drain connected to a row driver bus and a gate connected to a drain of the snapshot MOSFET; a row driver circuit connected to the row driver bus; an isolation MOSFET having a drain connected to a source of the driver MOSFET, a gate connected to an access signal, and a source connected to a column bus; and a column buffer connected to the column bus; wherein a tapered reset signal is applied to the reset MOSFET in order to reset the photodetector, and wherein during a reset operation, the row driver circuit grounds the driver transistor such that at least a portion of the column buffer acts as a current source for a feedback amplifier formed by the driver transistor, isolation transistor, and the column buffer. - View Dependent Claims (7, 8, 9, 10, 11, 12)
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Specification