Method for synchronizing and resetting clock signals supplied to multiple programmable analog blocks
First Claim
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1. A method for providing clock signals to a multi-functional device, said method comprising:
- a) selecting and electrically coupling analog blocks to form a combination of analog blocks, wherein said analog blocks in said combination are selected from a plurality of analog blocks coupled in a single integrated circuit, said plurality of analog blocks comprising a first set of analog blocks that can be selectively and electrically coupled to and decoupled from another analog block, wherein different analog functions are implemented by selectively and electrically coupling different combinations of said analog blocks; and
b) supplying a synchronized clock signal to all analog blocks in said combination of analog blocks, wherein said synchronized clock signal is supplied by a plurality of segment clock generators coupled to said combination of analog blocks.
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Abstract
A method for establishing frequency and phase alignment of clock signals across a domain of analog blocks coupled in a single integrated circuit. Different analog functions are implemented by selectively and electrically coupling different combinations of analog blocks. The analog blocks may be arrayed in a number of columns. A synchronized clock signal is supplied to all of the analog blocks in a combination of blocks, even when the blocks are in different columns. The frequency of the clock signal can be changed dynamically depending on the analog function to be achieved.
72 Citations
25 Claims
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1. A method for providing clock signals to a multi-functional device, said method comprising:
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a) selecting and electrically coupling analog blocks to form a combination of analog blocks, wherein said analog blocks in said combination are selected from a plurality of analog blocks coupled in a single integrated circuit, said plurality of analog blocks comprising a first set of analog blocks that can be selectively and electrically coupled to and decoupled from another analog block, wherein different analog functions are implemented by selectively and electrically coupling different combinations of said analog blocks; and b) supplying a synchronized clock signal to all analog blocks in said combination of analog blocks, wherein said synchronized clock signal is supplied by a plurality of segment clock generators coupled to said combination of analog blocks. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A method for synchronizing clock signals in a multi-functional device comprising a plurality of analog blocks coupled in a single integrated circuit, said method comprising:
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a) receiving at a plurality of segment clock generators a plurality of clock signals at different frequencies, said clock signals generated by a domain clock generator; b) selecting from said plurality of clock signals a first clock signal at a first segment clock generator, said first segment clock generator supplying said first clock signal to a first analog block in a first segment of analog blocks; c) selecting said first clock signal at a second segment clock generator, said second segment clock generator supplying said first clock signal to a second analog block in a second segment of analog blocks; wherein said first and second analog blocks are electrically coupled and in combination perform a function. - View Dependent Claims (13, 14, 15, 16, 17, 18)
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19. A method for a synchronizing clock signals in a multi-functional device, said method comprising:
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a) selecting and electrically coupling analog blocks to form a combination of analog blocks, wherein said analog blocks in said combination are selected from a plurality of analog blocks coupled in a single integrated circuit and arranged in an array having a plurality of columns, said plurality of analog blocks comprising a first set of analog blocks that can be selectively and electrically coupled to and decoupled from another analog block, wherein different analog functions are implemented by selectively and electrically coupling different combinations of said analog blocks; and b) receiving at a plurality of column clock generators a plurality of clock signals at different frequencies, wherein one column clock generator is coupled to each column in said array of analog blocks; and c) selecting from said plurality of clock signals a same clock signal at each column clock generator coupled to analog blocks in said combination of analog blocks. - View Dependent Claims (20, 21, 22, 23, 24, 25)
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Specification