Low-current and high-speed phase-change memory devices and methods of driving the same
First Claim
1. A phase-change memory comprising:
- a first electrode contact;
a phase-change layer on the first electrode contact; and
a second electrode contact on the phase-change layer, wherein a set state is a state in which amorphous nuclei are formed in the phase-change layer that has a set resistance of from about 4 kΩ
to 6 kΩ
, and a reset state is a state in which the number and density of the amorphous nuclei are greater than in the set state and has a reset resistance of about 6 kΩ
to 20 kΩ
.
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Abstract
Phase-change memories in which phase is changed by varying the resistance by a small amount are provided. In the phase-change memory, a set state is defined as a state where amorphous nuclei are formed in a phase-change layer of a memory cell and the phase-change layer has an initial resistance that is higher than in a crystalline matrix, and a reset state is defined as a state where the number and/or the density of the amorphous nuclei are greater than those in the set state and a resistance is higher than in the set state. A current for writing the reset and set states is reduced to several hundred microamperes, and a period required for writing the reset and set states is reduced to several tens of nanoseconds to several hundred nanoseconds.
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Citations
23 Claims
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1. A phase-change memory comprising:
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a first electrode contact;
a phase-change layer on the first electrode contact; and
a second electrode contact on the phase-change layer, wherein a set state is a state in which amorphous nuclei are formed in the phase-change layer that has a set resistance of from about 4 kΩ
to 6 kΩ
, and a reset state is a state in which the number and density of the amorphous nuclei are greater than in the set state and has a reset resistance of about 6 kΩ
to 20 kΩ
. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A phase change memory, comprising:
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first and second electrode contacts;
a phase-change layer between the first and second electrode contacts, the phase change layer providing a first state established by a first number of amorphous nuclei in a crystalline matrix in a region adjacent an interface between the phase-change layer and the first electrode. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15)
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16. A method of operating a phase change memory, comprising:
- establishing logic states in a phase change memory by controlling amorphous nucleation in a crystalline matrix of a phase-changeable material.
- View Dependent Claims (17, 18, 19, 20, 21, 22, 23)
Specification