Flash NVROM devices with UV charge immunity

• US 6,969,654 B1
• Filed: 11/28/2000
• Issued: 11/29/2005
• Est. Priority Date: 06/19/2000
• Status: Expired due to Term

• Current Assignee: Longitude Flash Memory Solutions, Ltd. (Vector Capital Corporation)
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Pham, Tuan Duc, Ramsbey, Mark T., Shields, Jeffrey A., Hui, Angela T., Hopper, Dawn
• Primary Examiner(s): Kebede, Brook
• Application Number:
  US09/727,714
• Time in Patent Office: 1,827 Days
• Field of Search: 438257-267, 438/142, 438/197, 438/275, 438/FOR.202, 438/FOR.203, 257314-320, 257/E29.306, 257/E29.308, 257/E29.309, 257/E27.103, 257/213, 257/288, 257/681, 257/E21.68, 257/E21.681, 257/E21.688, 365/185.33, 711/103
• US Class Current: 438/261
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 29/40114 the electrodes comprising a conductor-insulator-conductor-insulator-semiconductor structure
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H10B 43/30 characterised by the memory core region
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

A method of preventing UV charging of flash NVROM cells during fabrication and a device thereby formed. During device fabrication, a UV blocking layer is deposited over the floating gates. The UV blocking layer substantially blocks UV from entering the gate regions so as to prevent electron mobility sufficient to render the cells unprogrammable or unerasable. The reduced electron migration during processing of the NVROM leads to increased yield and reliability of the devices.

Claims

1. A method of fabricating a flash nonvolatile read-only memory (NVROM) semiconductor device having ultraviolet (UV) charge immunity, the method comprising:

providing a semiconductor substrate;

forming an oxide-nitride-oxide (ONO) layer on the semiconductor substrate;

forming at least one control gate on the ONO layer;

forming a first high temperature oxide (HTO) layer over the at least one control gate and the ONO layer;

forming a UV blocking layer over the first HTO layer;

forming a second HTO layer over the UV blocking layer; and

forming a borophosphosilicate (BPSG) interlayer dielectric (ILD) layer over the second HTO layer;

wherein the UV blocking layer substantially prevents UV light from reaching a nitride layer of the ONO layer.

2. The method, as recited in claim 1, wherein the UV blocking layer is formed from a material selected from a group consisting essentially of stoichiometric silicon nitride (Si₃N₄) and stoichiometric silicon oxynitride (SiON).

3. The method, as recited in claim 1, further comprising polishing the BPSG ILD.

4. The method, as recited in claim 1, wherein forming the UV blocking layer comprises forming the UV blocking layer with a thickness in the range of approximately 100 Å

up to approximately 2000 Å

.

5. The method, as recited in claim 1, further comprising etching the UV blocking layer for facilitating metallization of at least one contact to the at least one control gate.