Stacked amplifier arrangement for graphics displays

• US 6,970,152 B1
• Filed: 11/05/2002
• Issued: 11/29/2005
• Est. Priority Date: 11/05/2002
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Bell, Marshall J., Erhart, Richard Alexander, Ludden, Christopher A.
• Primary Examiner(s): Lefkowitz, Sumati
• Assistant Examiner(s): Beck, Alexander S.
• Application Number:
  US10/287,900
• Time in Patent Office: 1,120 Days
• Field of Search: 345/30, 345/40, 345/51, 345/52, 345/55, 345/56, 345/61, 345/68, 345 87-106, 345209-215, 345/204, 330/96, 330/98, 330/123, 330/127, 330/199, 330/250, 330/253
• US Class Current: 345/100
• CPC Class Codes: G09G 2310/0235 Field-sequential colour display
• CPC Class Codes: G09G 2330/023 using energy recovery or conservation
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

A column driver for a graphics display has reduced power consumption by sharing power between upper and lower column amplifiers. The upper column amplifier operates over an upper supply range, while the lower column amplifier operates over a lower supply range. The upper and lower amplifiers have the substantially the same quiescent operating current such that the total operating current for the column drivers in the graphics display is reduced by a factor of two. Each column amplifier can be driven over half of the power-supply range such that lower voltage amplifiers may be employed for the column driver amplifiers.

Claims

1. A column driver circuit for a graphics display, comprising:

an upper amplifier circuit that includes an upper supply terminal that is coupled to an upper power supply, and a lower supply terminal that is coupled to a common power supply; and

a lower amplifier circuit that includes an upper supply terminal that is coupled to the common power supply, and a lower supply terminal that is coupled to a lower power supply, wherein the upper amplifier circuit is configured to drive a column of the graphics display over an upper supply range and the lower amplifier circuit is configured to drive another column of the graphics display over the lower supply range, wherein the upper and lower amplifier circuits are arranged to share a common quiescent operating current.

2. The column driver circuit as in claim 1, wherein the upper and lower amplifier circuits are configured as unity gain buffers.

3. The column driver circuit as in claim 1, wherein the upper and lower amplifier circuits are configured as inverting amplifiers.

4. The column driver circuit as in claim 1, wherein the upper amplifier circuit is optimized for operation over an upper power supply range that is bounded by the common power supply and the upper power supply, and wherein the lower amplifier circuit is optimized for operation over a lower power supply range that is bounded by the lower power supply and the upper power supply.

5. The column driver circuit as in claim 1, wherein the column and the other column are adjacent columns in the graphics display.

6. The column driver circuit of claim 1, further comprising:

a first switching circuit that is coupled to a column input signal, an input of the upper amplifier circuit, and another input of the lower amplifier circuit, wherein the first switching circuit is arranged selectively couple the column input signal to one of the input and the other input in response to a control signal; and

a second switching circuit that is coupled to another column input signal, the input of the upper amplifier circuit, and other input of the lower amplifier circuit, and wherein the second switching circuit is arranged to selectively couple the other column input signal to another of the input and the other input in response to the control signal.

7. The column driver circuit of claim 6, wherein the column input signal corresponds to an odd column of the graphics display and the other column input signal corresponds to an even column of the graphics display.

8. The column driver circuit of claim 1, further comprising:

a first switching circuit that is coupled to the column, an output of the upper amplifier circuit, and another output of the lower amplifier circuit, wherein the first switching circuit is arranged selectively couple the column to one of the output and the other output in response to a control signal; and

a second switching circuit that is coupled to the other column, the output of the upper amplifier circuit, and other output of the lower amplifier circuit, wherein the second switching circuit is arranged to selectively couple the other column input signal to another of the output and the other output in response to the control signal.

9. The column driver circuit of claim 8, wherein the column corresponds to an odd column of the graphics display and the other column corresponds to an even column of the graphics display.

10. The column driver circuit of claim 1, further comprising:

a first switching circuit that is coupled to a column input signal, an input of the upper amplifier circuit, and another input of the lower amplifier circuit, wherein the first switching circuit is arranged selectively couple the column input signal to one of the input and the other input in response to a control signal;

a second switching circuit that is coupled to another column input signal, the input of the upper amplifier circuit, and other input of the lower amplifier circuit, and wherein the second switching circuit is arranged to selectively couple the other column input signal to another of the input and the other input in response to the control signal;

a third switching circuit that is coupled to the column, an output of the upper amplifier circuit, and another output of the lower amplifier circuit, wherein the third switching circuit is arranged selectively couple the column to one of the output and the other output in response to a control signal; and

a fourth switching circuit that is coupled to the other column, the output of the upper amplifier circuit, and other output of the lower amplifier circuit, wherein the fourth switching circuit is arranged to selectively couple the other column input signal to another of the output and the other output in response to the control signal.

11. The column driver circuit of claim 10, wherein the column input signal and the column are associated with an odd column of the graphics display, and the other column input signal and the other column are associated with an even column of the graphics display.

12. The column driver circuit of claim 1, wherein the upper amplifier circuit and the lower amplifier circuit are arranged to have substantially matched quiescent currents such that a total power consumption by two adjacent column driver circuits is reduced by about fifty percent.

13. The column driver circuit of claim 1, wherein the upper amplifier circuit and the lower amplifier circuit are arranged to operate over the upper supply range and the lower supply range, respectively, so that at least one protection device for the upper amplifier circuit and at least another protection device for the lower amplifier circuit against breakdown voltage is eliminated.

14. The column driver circuit of claim 13, wherein the upper supply range and the lower supply range are about fifty percent of a total supply range.

15. The column driver circuit of claim 13, wherein the upper amplifier circuit and the lower amplifier circuit without the at least one protection device and the at least other protection device are arranged to operate at a relatively higher speed.

16. The column driver circuit of claim 1, wherein the upper amplifier circuit and the lower amplifier circuit each comprise at least one of:

a Bipolar Junction Transistor (BJT), a Metal-Semiconductor Field Effect Transistor (MESFET), and a Metal-Oxide Field Effect Transistor (MOSFET).

17. The column driver circuit of claim 1, wherein the upper amplifier circuit is arranged to receive one of an odd column signal and an even column signal, and wherein the lower amplifier circuit is arranged to receive the other of the odd column signal and the even column signal.

18. The column driver circuit of claim 1, wherein the upper amplifier circuit and the lower amplifier circuit are arranged to simultaneously drive the column of the graphics display and the other column of the graphics display, respectively.

19. A column driver circuit for a graphics display, comprising:

a first means for buffering that is arranged to provide a buffered signal that is in an upper supply range that is bounded by a common power supply and an upper power supply;

a second means for buffering that is arranged to provide another buffered signal that is in a lower supply range that is bounded by a lower power supply and the common power supply, wherein the first means for buffering and the second means for buffering are configured to share quiescent operating current;

a first means for coupling that is arranged to couple a column input signal to one of the first means for buffering and the second means for buffering in response to a control signal;

a second means for coupling that is arranged to couple another column input signal to the other of the first means for buffering and the second means for buffering in response to the control signal;

a third means for coupling that is arranged to couple the buffered signal to one of a column of the graphics display and another column of the graphics display in response to the control signal; and

a fourth means for coupling that is arranged to couple the other buffered signal to the other of the column of the graphics display and the other column of the graphics display in response to the control signal.

20. A column driver circuit for a graphics display, comprising:

an upper amplifier circuit that includes an upper supply terminal that is coupled to an upper power supply, and a lower supply terminal that is coupled to a common power supply;

a lower amplifier circuit that includes an upper supply terminal that is coupled to the common power supply, and a lower supply terminal that is coupled to a lower power supply, wherein the upper amplifier circuit is configured to drive a column of the graphics display over an upper supply range and the lower amplifier circuit is configured to drive another column of the graphics display over the lower supply range, wherein the upper and lower amplifier circuits are arranged to share a common quiescent operating current;

a first switching circuit that is coupled to a column input signal, an input of the upper amplifier circuit, and another input of the lower amplifier circuit, wherein the first switching circuit is arranged selectively couple the column input signal to one of the input and the other input in response to a control signal;

a second switching circuit that is coupled to another column input signal, the input of the upper amplifier circuit, and other input of the lower amplifier circuit, and wherein the second switching circuit is arranged to selectively couple the other column input signal to another of the input and the other input in response to the control signal;

a third switching circuit that is coupled to the column, an output of the upper amplifier circuit, and another output of the lower amplifier circuit, wherein the third switching circuit is arranged selectively couple the column to one of the output and the other output in response to a control signal; and

a fourth switching circuit that is coupled to the other column, the output of the upper amplifier circuit, and other output of the lower amplifier circuit, wherein the fourth switching circuit is arranged to selectively couple the other column input signal to another of the output and the other output in response to the control signal.

21. A circuit for driving a pair of columns of a graphics display, wherein the pair of columns includes a first column and a second column, the circuit comprising:

a switching circuit that is arranged to;

receive a first input signal and a second input signal, provide a first drive signal in response to one of the first input signal and the second input signal, and provide a second drive signal in response to the other of the first input signal and the second input signal;

a first amplifier circuit that is arranged to drive the first column of the graphics display in response to the first drive signal; and

a second amplifier circuit is arranged to drive the second column of the graphics display based in response to the second drive signal, wherein the first amplifier circuit and the second amplifier circuit are arranged such that the first column and the second column of the graphics display are concurrently driven by a respective one of the first amplifier circuit and the second amplifier circuit, and wherein the first amplifier circuit and the second amplifier circuit are commonly biased.

22. A circuit for driving a pair of columns of a graphics display, wherein the pair of columns includes a first column and a second column, the circuit comprising:

a first switching circuit that is arranged to;

receive a first input signal and a second input signal, provide a first drive signal in response to one of the first input signal and the second input signal, and provide a second drive signal in response to the other of the first input signal and the second input signal;

a first amplifier circuit that is arranged to provide a first output signal in response to the first drive signal;

a second amplifier circuit is arranged to provide a second output signal in response to the second drive signal, wherein the first amplifier circuit and the second amplifier circuit are commonly biased; and

a second switching circuit that is arranged to provide one of the first output signal and the second output signal to the first column of the graphics display, and provide the other of the first output signal and the second output signal to the second column of the graphics display such that the first amplifier circuit and the second amplifier circuit are concurrently driving a respective one of the first and second columns.