Methods and apparatus for low power delay control
First Claim
1. A method of producing a time delay, the method performed with an information processor having a first timer and a second timer the information processor being capable of maintaining a sleep mode, the method comprising the steps of:
- a) arranging the information processor so as to terminate the sleep mode when the first timer reaches timeout;
b) using the second timer to measure the timeout for the first timer;
c) disabling the second timer; and
d) repetitively causing the information processor to enter the sleep mode and causing the information processor to be awakened by the first timer reaching timeout so as to substantially produce the time delay.
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Abstract
A method of producing a time delay is provided. The method is performed with an information processor having a first timer and a second timer. The information processor is capable of maintaining a sleep mode. The method involves using the second timer to measure the timeout for the first timer. The method also includes repetitively causing the information processor to enter the sleep mode so as to be awakened by the first timer reaching timeout to substantially produce a time delay while the second timer is disabled.
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Citations
20 Claims
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1. A method of producing a time delay, the method performed with an information processor having a first timer and a second timer the information processor being capable of maintaining a sleep mode, the method comprising the steps of:
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a) arranging the information processor so as to terminate the sleep mode when the first timer reaches timeout; b) using the second timer to measure the timeout for the first timer; c) disabling the second timer; and d) repetitively causing the information processor to enter the sleep mode and causing the information processor to be awakened by the first timer reaching timeout so as to substantially produce the time delay. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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- 10. An apparatus for producing a time delay comprising an information processor having a first timer and a second timer, the information processor being capable of producing a sleep mode, the first timer having an upper time limit, the information processor being configured so as to awaken from the sleep mode in response to the first timer reaching the upper time limit, the information processor being capable of using the second timer to measure the upper time limit for the first timer, the information processor being capable of entering the sleep mode and running the first timer so as to cause the information processor to awaken from the sleep mode, the information processor being capable of entering the sleep mode and being awakened for a number of repetitions so as to produce the time delay.
- 19. An apparatus for producing a time delay with low-power consumption, the apparatus comprising a microprocessor having a watchdog timer and a high accuracy clock, the microprocessor being capable of producing a sleep mode, the watchdog timer having an upper time limit, the microprocessor being configured so as to awaken from the sleep mode in response to the watchdog timer reaching the upper time limit, the microprocessor being capable of using the high accuracy clock to measure the upper time limit for the watchdog timer, the microprocessor being capable of entering the sleep mode and running the watchdog timer so as to cause the microprocessor to awaken from the sleep mode, the microprocessor being capable of entering the sleep mode and being awakened for a number of repetitions so as to produce the time delay with the high accuracy clock disabled, wherein the watchdog timer requires less power than is required by the high accuracy clock, and wherein the high accuracy clock is more accurate for measuring time than is the watchdog timer.
Specification