Configuration of a flat carrier with a chip module in a padded envelope and method of arranging the configuration

• US 6,971,519 B2
• Filed: 11/27/2002
• Issued: 12/06/2005
• Est. Priority Date: 05/29/2000
• Status: Expired due to Fees

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Fries, Manfred
• Primary Examiner(s): BUI, LUAN KIM
• Application Number:
  US10/306,181
• Publication Number:
  US 20030080025A1
• Time in Patent Office: 1,105 Days
• Field of Search: 206/449, 206/454, 206/460, 206/813, 235/380, 235/454, 235/486, 283/61, 283/62, 283/74, 283/75, 283/904, 264/132, 264/263, 264/266, 264/267, 534/52, 534/60, 534/61, 534/67, 534/73, 534/76
• US Class Current: 206/454
• CPC Class Codes: B65D 27/02 with stiffening inserts
• CPC Class Codes: G06K 19/077 Constructional details, e.g. mounting of circuits in the carrier
• CPC Class Codes: G06K 19/07728 the record carrier comprising means for protection against impact or bending, e.g. protective shells or stress-absorbing layers around the integrated circuit
• CPC Class Codes: G07B 17/00467 Transporting mailpieces postal sorting B07C
• CPC Class Codes: G07B 2017/00491 Mail/envelope/insert handling system

Abstract

A configuration of a flat carrier with a chip module in a padded envelope, which can be transported in a transport device in the direction of one of the envelope'"'"'s side edges, includes disposing the chip module in the padded envelope such that wire connections in the chip module extend over a side of the semiconductor chip that runs parallel to the transport device. Such a configuration is made possible by the fact that the flat carrier is applied in a standard way to a further carrier, which is folded in a suitable way.

Claims

1. A configuration for transporting a chip module carrier, comprising:

a padded envelope having long side edges and short side edges to be transported in a transport device along a transport direction parallel to at least one of said long side edges; and

a flat carrier having a chip module with a semiconductor chip and wire connections connected to said semiconductor chip, said wire connections having a length, said flat carrier being disposed in said padded envelope to extend said length of said wire connections over a side of said semiconductor chip running parallel to said transport direction.

2. The configuration according to claim 1, including a further carrier, said flat carrier with said chip module being detachably fixed to Bald further carrier.

3. The configuration according to claim 2, wherein:

said padded envelope has dimensions; and

said further carrier has dimensions matched to said dimensions of said padded envelope.

4. The configuration according to claim 2, wherein:

said padded envelope has internal dimensions; and

said further carrier has external dimensions substantially matched to said internal dimensions of said padded envelope for fitting into said padded envelope.

5. The configuration according to claim 1, wherein said chip module is disposed in said padded envelope to place said chip module in an area that cannot be stamped by a stamping or franking machine.

6. The configuration according to claim 1, wherein:

said padded envelope has an area at which said padded envelope is stamped by a stamping or franking machine; and

said chip module is disposed in said padded envelope to place said chip module outside said area.

7. The configuration according to claim 1, wherein said flat carrier is a smart card.

8. The configuration according to claim 7, wherein said smart card has long sides and is placed in said padded envelope with said long sides disposed at right angles to said transport direction.

9. The configuration according to claim 7, wherein said smart card has long sides and is placed in said padded envelope with said long sides disposed orthogonal to said transport direction.

10. In a padded envelope having long side edges and short side edges to be transported in a transport device along a transport direction parallel to at least one of the long side edges, a chip module carrier transporting configuration, comprising:

a flat carrier having a chip module with a semiconductor chip and wire connections connected to said semiconductor chip, said wire connections having a length, said flat carrier to be disposed in the padded envelope to extend said length of said wire connections over a side of said semiconductor chip running parallel to the transport direction parallel to at least one of the long side edges.

11. A method for producing a configuration for transporting a chip module carrier, the method of which comprises:

providing a padded envelope having long side edges and short side edges to be transported in a transport device along a transport direction parallel to at least one of the long side edges;

providing a flat carrier having a chip module with a semiconductor chip and wire connections connected to the semiconductor chip, the wire connections having a length;

applying the flat carrier with the chip module to an area of a further carrier;

folding the further carrier to create a folding line traversing the area occupied by the flat carrier; and

enveloping the further carrier in the padded envelope causing the flat carrier being disposed in the padded envelope to extend the length of the wire connections over a side of the semiconductor chip running parallel to the transport direction.

12. The method according to claim 11, wherein;

the further carrier has a first side and a second side orthogonally disposed with respect to the first side; and

the folding line runs from the first side to the second side and forms a triangular area.

13. The method according to claim 12, wherein the triangular area is equilateral.

14. The method according to claim 12, which comprises fixing the flat carrier in the triangular area.

15. The method according to claim 11, wherein:

the further carrier has folding lines and sides not intersecting any of the folding lines; and

the flat carrier is fixed to the further carrier to face the chip module towards the sides not intersecting any of the folding lines.

16. The method according to claim 11, wherein:

the further carrier has folding lines and sides not intersecting any of the folding lines; and

the flat carrier is fixed to the further carrier to face the chip module towards at least one of the sides not intersecting any of the folding lines.

17. A method for producing a configuration for transporting a chip module carrier, the method of which comprises:

providing a padded envelope having long side edges and short side edges to be transported in a transport device along a transport direction parallel to at least one of the long side edges;

providing a flat carrier having a chip module with a semiconductor chip and wire connections connected to the semiconductor chip, the wire connections having a length;

folding a further carrier with the chip module at a folding line from an original shape of the further carrier;

applying the flat carrier to the further carrier to at least partly traverse the folding line with the flat carrier;

folding the further carrier back at the folding line to place the further carrier in the original shape; and

enveloping the further carrier in the padded envelope causing the flat carrier being disposed in the padded envelope to extend the length of the wire connections over a side of the semiconductor chip running parallel to the transport direction.

18. The method according to claim 17, wherein;

the further carrier has a first side and a second side orthogonally disposed with respect to the first side; and

the folding line runs from the first side to the second side and forms a triangular area.

19. The method according to claim 18, wherein the triangular area is equilateral.

20. The method according to claim 18, which comprises fixing the flat carrier in the triangular area.

21. The method according to claim 17, wherein:

the further carrier has folding lines and sides not intersecting any of the folding lines; and

the flat carrier is fixed to the further carrier to face the chip module towards the sides not intersecting any of the folding lines.

22. A method for safely transporting a chip module carrier, which comprises:

providing a flat carrier having a chip module with a semiconductor chip and wire connections connected to the semiconductor chip, the wire connections having a length;

applying the flat carrier having the chip module to an area of a further carrier;

folding the further carrier to create a folding line traversing the area occupied by the flat carrier; and

enveloping the further carrier in a padded envelope having long side edges and short side edges to be transported in a transport device along a transport direction parallel to at least one of the long side edges, causing the flat carrier being disposed in the padded envelope to extend the length of the wire connections over a side of the semiconductor chip running parallel to the transport direction.

23. A method for safely transporting a chip module carrier, which comprises:

providing a flat chip module carrier having a chip module with a semiconductor chip and wire connections connected to the semiconductor chip, the wire connections having a length;

folding a carrier at a folding line from an original shape of the carrier;

applying the flat chip module carrier to the carrier to at least partly traverse the folding line with the flat chip module carrier;

folding the carrier back at the folding line to place the carrier in the original shape; and

enveloping the carrier in a padded envelope having long side edges and short side edges to be transported in a transport device along a transport direction parallel to at least one of the long side edges, causing the flat carrier being disposed in the padded envelope to extend the length of the wire connections over a side of the semiconductor chip running parallel to the transport direction.

24. A configuration for transporting a chip module carrier, comprising:

a padded envelope having long side edges and short side edges to be transported in a transport device along a transport direction parallel to at least one of said long side edges; and

a flat carrier having a chip module with a semiconductor chip and wire connections connected to said semiconductor chip in a wire connection direction, said flat carrier being disposed in said padded envelope to orient said wire connection direction and said wire connections orthogonal to said transport direction.