Metal etch process selective to metallic insulating materials
First Claim
1. A method for processing a semiconductor topography, comprising:
- depositing a tunneling layer above one or more underlying magnetic layers;
depositing one or more overlying magnetic layers above the tunneling layer;
patterning the one or more overlying magnetic layers with an etch chemistry comprising HBr to form an upper portion of a magnetic cell junction; and
terminating the step of patterning upon exposing the tunneling layer.
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Accused Products
Abstract
A method is provided which includes patterning one or more metal layers arranged above a metal insulating layer and terminating the patterning process upon exposure of the metal insulating layer. In particular, the method may be adapted to be more selective to the metal insulating layer than the one or more metal layers. In general, such an adaptation may include exposing the semiconductor topography to an etch chemistry comprising hydrogen bromide. In some cases, the etch chemistry may further include a fluorinated hydrocarbon. In yet other embodiments, the method may further or alternatively include using a reactive ion etch process, etching at a relatively low temperature, using a resist mask, and/or using an etch chemistry substantially absent of an oxygen plasma. In this manner, the method may, in some embodiments, include patterning the one or more metal layers using a reactive ion etch process substantially absent of an oxygen plasma.
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Citations
11 Claims
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1. A method for processing a semiconductor topography, comprising:
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depositing a tunneling layer above one or more underlying magnetic layers; depositing one or more overlying magnetic layers above the tunneling layer; patterning the one or more overlying magnetic layers with an etch chemistry comprising HBr to form an upper portion of a magnetic cell junction; and terminating the step of patterning upon exposing the tunneling layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification