Methods for critical dimension and focus mapping using critical dimension test marks
First Claim
1. A method comprising:
- repeatedly exposing a wafer with a lithography tool to form a plurality of test fields on the surface of the wafer, each test field including a plurality of test marks;
measuring a characteristic of the test marks;
determining a focus characteristic associated with each test field based at least in part on the measured characteristics;
mapping the wafer based on the determined focus characteristics, whereby the mapping may demonstrate variations in the determined focus characteristics across the wafer;
characterizing the lithography tool based on the mapped wafer to account for any determined focus characteristic variations of interest; and
adjusting the lithography tool to improve focusing based on the characterization.
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Abstract
Methods for using critical dimension test marks (test marks) for the rapid determination of the best focus position of lithographic processing equipment and critical dimension measurement analysis across a wafer'"'"'s surface are described. In a first embodiment, a plurality of test mark arrays are distributed across the surface of a wafer, a different plurality being created at a plurality of focus positions. Measurement of the length or area of the resultant test marks allows for the determination of the best focus position of the processing equipment. Critical dimension measurements at multiple points on a wafer with test marks allow for the determination of process accuracy and repeatability and further allows for the real-time detection of process degradation. Using test marks which require only a relatively simple optical scanner and sensor to measure their length or area, it is possible to measure hundreds of measurement values across a wafer in thirty minutes. Comparable measurements with a Scanning Electron Microscope (SEM) require at least five hours.
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Citations
30 Claims
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1. A method comprising:
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repeatedly exposing a wafer with a lithography tool to form a plurality of test fields on the surface of the wafer, each test field including a plurality of test marks; measuring a characteristic of the test marks; determining a focus characteristic associated with each test field based at least in part on the measured characteristics; mapping the wafer based on the determined focus characteristics, whereby the mapping may demonstrate variations in the determined focus characteristics across the wafer; characterizing the lithography tool based on the mapped wafer to account for any determined focus characteristic variations of interest; and adjusting the lithography tool to improve focusing based on the characterization. - View Dependent Claims (2, 3, 4, 5)
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6. A method for determining the performance of semiconductor wafer processing equipment, the method comprising:
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creating a plurality of test fields on the surface of the semiconductor wafer during a processing step, each test field including a plurality of test marks, the test marks being made by an imaging pattern with known critical dimensions; measuring the test marks after the processing step is complete, wherein the measurements are indicative of a critical dimension; determining a characteristic associated with each test field based at least in part on the measured test marks, wherein the determined characteristics facilitate mapping the wafer in a manner that may demonstrate variations in the determined characteristics across the wafer; and adjusting the equipment if the test marks are not measured to have at least a predefined value, wherein the adjustments are made in a manner that is capable of accounting for variations that occur across the wafer. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13)
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14. A method for using test marks generated by a lithographic process, the method comprising the steps of:
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selecting a plurality of areas of a semiconductor wafer upon which test marks will be generated; generating a test field in each of the selected areas by using a lithographic process, each test filed including a plurality of test marks; measuring at least a first predefined parameter of the test marks; determining a characteristic associated with each test field based at least in part on the measured test marks, wherein the determined characteristics facilitate mapping the wafer in a manner that may demonstrate variations across the wafer; and altering at least one parameter of the lithographic process depending on the results of the measuring step in a manner that compensates for variations that occur across the wafer. - View Dependent Claims (15, 16, 17, 18, 19)
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20. A method for determining the best focus position of a lithographic production device, the method comprising the steps of:
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creating a plurality of test fields in a resist, wherein each test field has a multiplicity of test marks that are stepped through focus; measuring each of the test marks, thereby generating test mark data; using the test mark data to select a best focus profile for future operation of the lithographic production device that created test marks wherein the best focus profile accounts for variations in the best focus that occur across the wafer. - View Dependent Claims (21, 22, 23, 24)
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25. A method for determining the best focus position of a lithographic production device, the method comprising the steps of:
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creating a plurality of test marks across a surface of a wafer at a first focus position; stepping the focus position to a successive focus position; repeating the creating and stepping operations until a plurality of test marks has been created on the wafer at a predefined plurality of focus steps, the plurality of test marks being arranged in a plurality of test fields that are distributed at different locations across the wafer; measuring each of the test marks; and selecting the a focus profile step for future operation of the lithographic production device that created test marks based at least in part on the test marks in each test field having the largest measure value, wherein the focus profile accounts for variation in focus that occur across the wafer. - View Dependent Claims (26, 27, 28, 29, 30)
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Specification