Reactor precoating for reduced stress and uniform CVD

• US 6,974,781 B2
• Filed: 10/20/2003
• Issued: 12/13/2005
• Est. Priority Date: 10/20/2003
• Status: Active Grant

• Current Assignee: ASM International NV
• Original Assignee: ASM International NV
• Inventors: Timmermans, Eric A. H., Mucciato, Raffaele, Teepen, Maarten J., Wilhelm, Rudi
• Primary Examiner(s): PERT, EVAN T
• Application Number:
  US10/690,215
• Publication Number:
  US 20050085098A1
• Time in Patent Office: 785 Days
• Field of Search: 438/758, 438/778, 438779-784, 438791-794, 427/255.28, 427/255.39, 427/255.393, 427/255.394
• US Class Current: 438/794
• CPC Class Codes: C23C 16/345 Silicon nitride
• CPC Class Codes: C23C 16/4404 Coatings or surface treatment on the inside of the reaction chamber or on parts thereof
• CPC Class Codes: C23C 16/4405 Cleaning of reactor or parts inside the reactor by using reactive gases
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/02211 the compound being a silane, e.g. disilane, methylsilane or chlorosilane
• CPC Class Codes: H01L 21/3185 of siliconnitrides

Abstract

A method is provided for obtaining stable and elevated deposition rates in a reaction chamber, following the cleaning of the chamber. The method involves cleaning of the chamber, pre-coating the interior surfaces of the reaction chamber with an inorganic composition, and then, using the pre-coated chamber to deposit an organic layer onto a workpiece.

Claims

1. A process for reducing the loss in deposition rate following the cleaning of a reaction chamber, said process comprising:

cleaning a reaction chamber;

pre-coating the reaction chamber with silicon nitride using an inorganic silicon reactant and a pre-coating nitrogen source; and

depositing silicon nitride on a workpiece in the pre-coated reaction chamber using an organic silicon reactant.

2. The process of claim 1, wherein the inorganic silicon reactant is selected from the group consisting of SiH₄, Si₂H₆ and Si₃H₈.

3. The process of claim 1, wherein the inorganic silicon reactant is selected from the group consisting of SiH₂Cl₂, SiH₃Cl, SiHCl₃, and SiCl₄.

4. The process of claim 1, wherein the inorganic silicon reactant is dichlorosilane (DCS).

5. The process of claim 4, wherein pre-coating occurs at approximately 700°

C. or greater.

6. The process of claim 1, wherein the pre-coating nitrogen source for pre-coating is an inorganic source of nitrogen.

7. The process of claim 5, wherein the pre-coating nitrogen source is ammonia.

8. The process of claim 1, wherein depositing further comprises using a separate nitrogen source.

9. The process of claim 8, wherein the separate nitrogen source is the same as the pre-coating nitrogen source.

10. The process of claim 1, wherein the organic silicon reactant is bis-tertiary-butyl amino silane (BTBAS).

11. The process of claim 1, wherein the reaction chamber is made from a material selected from the group consisting of quartz, SiC, and silicon-impregnated SiC.

12. A method of treating quartz materials to maintain a relatively constant deposition rate on wafers, said method comprising:

administering a dichlorosilane-based (DCS-based) silicon nitride pre-coat to quartz materials;

loading a wafer into a reaction chamber having the pre-coated quartz materials; and

depositing a film onto the wafer using an organic silicon precursor.

13. The method of claim 12, wherein depositing the film further comprises depositing silicon nitride onto the quartz materials.

14. A method for maintaining a constant rate of deposition for bis-tertiary-butyl amino silane (BTBAS) and ammonia deposition, said method comprising:

cleaning a vertical furnace for batch processing of wafers;

coating surfaces of the cleaned vertical furnace with a dichlorosilane-based layer deposition process; and

administering BTBAS and ammonia to a batch of wafers in the coated vertical furnace.

15. A process for reducing surface roughness in a reaction chamber, said process comprising:

cleaning the reaction chamber in-situ, wherein during the cleaning, the wafer boat is in the chamber;

using dichlorosilane (DCS) to deposit a DCS-based film on the reaction chamber, including the wafer boat, while no workpiece is present in the reaction chamber; and

subsequently using bis-tertiary-butyl amino silane (BTBAS) to deposit a BTBAS-based layer on a workpiece supported in the reaction chamber.

16. The method of claim 15, wherein the DCS-based film deposition occurs at a temperature of approximately 700°

C. or greater and the deposition of the BTBAS-based layer occurs at a temperature of approximately 650°

C. or less.

17. A method for operating a reaction chamber for the deposition of silicon nitride films on semiconductor substrates comprising the steps of:

a) carrying out a number of silicon nitride deposition runs on semiconductor wafers in the reaction chamber, using ammonia and bis-tertiary-butyl amino silane (BTBAS) as precursors;

b) after building up a cumulative BTBAS-derived nitride thickness on the reaction chamber, performing an in-situ clean of the reaction chamber by feeding a cleaning gas into the reaction chamber;

c) depositing a nitride precoating on the cleaned reaction chamber using ammonia and dichlorosilane (DCS) as precursors; and

d) re-starting the cycle of steps a), b), c) and d) in sequence.

18. The method of claim 17, wherein the temperature while depositing the nitride pre-coating is approximately 700°

C. or greater.

19. The method of claim 18, wherein the silicon nitride deposition runs are conducted at less than about 650°

C.

20. The method of claim 19, wherein the in-situ clean is conducted at between about 500°

C. and 600°

C.