Trench MOSFET superjunction structure and method to manufacture
First Claim
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1. A semiconductor device comprising:
- a semiconductor region of first conductivity formed over a semiconductor substrate of said first conductivity;
a semiconductor trench receiving region formed over said semiconductor region of said first conductivity;
a plurality of trenches in said trench receiving region, each trench including a bottom surface and opposing sidewalls;
a channel region of a second conductivity adjacent said trenches;
a conductive column of said first conductivity directly under the bottom surface of a respective trench and reaching said semiconductor region of said first conductivity;
a region of said second conductivity adjacent and lateral to each conductive column, said region being in charge balance with said conductive columns, and adjacent said channel region;
conductive regions of said first conductivity adjacent each trench and in said channel region;
a gate insulation layer on said sidewalls of said trenches;
a gate electrode in each of said trenches; and
an electrical contact layer over said trench receiving region and in contact with said conductive regions of said first conductivity.
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Abstract
A power semiconductor device including a plurality of trenches each for supporting a gate structure adjacent a channel region, and a plurality of drain columns each under the bottom of each trench, and each formed by multiple high energy implants.
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Citations
16 Claims
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1. A semiconductor device comprising:
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a semiconductor region of first conductivity formed over a semiconductor substrate of said first conductivity; a semiconductor trench receiving region formed over said semiconductor region of said first conductivity; a plurality of trenches in said trench receiving region, each trench including a bottom surface and opposing sidewalls; a channel region of a second conductivity adjacent said trenches; a conductive column of said first conductivity directly under the bottom surface of a respective trench and reaching said semiconductor region of said first conductivity; a region of said second conductivity adjacent and lateral to each conductive column, said region being in charge balance with said conductive columns, and adjacent said channel region; conductive regions of said first conductivity adjacent each trench and in said channel region; a gate insulation layer on said sidewalls of said trenches; a gate electrode in each of said trenches; and an electrical contact layer over said trench receiving region and in contact with said conductive regions of said first conductivity. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A semiconductor device comprising:
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an epitaxially formed drain region of a first conductivity formed over a semiconductor substrate of the same conductivity; a trench receiving region; a plurality of trenches formed in said trench receiving region, each trench including a bottom surface and opposing sidewalls; a channel region of a second conductivity adjacent said trenches; source regions of a first conductivity formed in said trench receiving region adjacent said trenches; a plurality of columns of said first conductivity each formed under and directly below a respective trench and extending between the bottom of said trench to said drain region, each column being spaced from another column by an adjacent and laterally disposed region of said second conductivity in charge balance with said plurality of columns; a gate insulation layer formed at least on said sidewalls of said trenches; a gate electrode formed in each of said trenches; and a source contact layer formed over said trench receiving region and in contact with said source regions. - View Dependent Claims (9, 10, 11, 12)
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13. A method for manufacturing a semiconductor device comprising:
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providing a trench receiving semiconductor layer of a first conductivity; forming a mask over said trench receiving semiconductor layer, said mask including openings, each opening terminating at said trench receiving semiconductor layer at its bottom; forming a trench in said trench receiving layer at said bottom of each of said openings in said mask; leaving said mask in place; sequentially implanting dopants of said second conductivity through the bottom of said trench at a plurality of different depths to form a plurality of implant regions below the bottom of said trench; forming a column of said second conductivity below said trench by applying a diffusion drive so that dopants at each of said plurality of implant regions diffuses to reach at least the dopants of an adjacent implant region; and forming regions of said first conductivity adjacent each said column of said second conductivity, said regions of said first conductivity being in charge balance with said columns of said second conductivity. - View Dependent Claims (14, 15, 16)
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Specification