Methods and apparatus for thermal management of an integrated circuit die

• US 6,980,918 B2
• Filed: 04/09/2004
• Issued: 12/27/2005
• Est. Priority Date: 03/30/1999
• Status: Expired due to Term

• Current Assignee: Sony Corporation Of America (Sony Group Corp.)
• Original Assignee: Intel Corporation
• Inventors: Binns, Frank, Burton, Edward A., Gunther, Stephen H., Rankin, Linda J., Pippin, Jack D., Bauer, John M., Carmean, Douglas M.
• Primary Examiner(s): Bui, Bryan
• Assistant Examiner(s): LAU, TUNG S
• Application Number:
  US10/821,292
• Publication Number:
  US 20040204899A1
• Time in Patent Office: 627 Days
• Field of Search: 702/132, 327/114, 327/170, 340/584, 340/648, 700/299, 700/293, 713/100, 361/103, 332/109, 165/209, 257/106, 374/178
• US Class Current: 702/132
• CPC Class Codes: G01K 7/015 using microstructures, e.g. made of silicon
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/3237 by disabling clock generation or distribution
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

An integrated, on-chip thermal management system providing closed-loop temperature control of an IC device and methods of performing thermal management of an IC device. The thermal management system comprises a temperature detection element, a power modulation element, a control element, and a visibility element. The temperature detection element includes a temperature sensor for detecting die temperature. The power modulation element may reduce the power consumption of an IC device by directly lowering the power consumption of the IC device, by limiting the speed at which the IC device executes instructions, by limiting the number of instructions executed by the IC device, or by a combination of these techniques. The control element allows for control over the behavior of the thermal management system, and the visibility element allows external devices to monitor the status of the thermal management system.

Claims

1. An apparatus comprising:

a first register to provide an enable/disable bit for a thermal management system on an integrated circuit die;

a second register to selectively disengage a specified portion of the thermal management system;

a third register to enable the thermal management system in response to an external event;

a fourth register to force the thermal management system active while overriding a disable bit provided by the first register; and

a fifth register to allow external software and hardware to enable the thermal management system.

2. The apparatus of claim 1, further comprising a visibility element to indicate a status of an output of a temperature sensor associated with the thermal management system.

3. The apparatus of claim 2, the visibility element comprising:

a register to indicate the status of the temperature sensor output;

another register to provide a sticky bit;

a counter to count a number of lost clock cycles resulting from operation of the thermal management system; and

circuitry to generate an interrupt when the temperature sensor output transitions to a different state.

4. The apparatus of claim 2, further comprising a power modulation element to reduce power consumption of the integrated circuit die in response to the temperature sensor output.