Multiple use of microcontroller pad

• US 6,981,090 B1
• Filed: 06/26/2001
• Issued: 12/27/2005
• Est. Priority Date: 10/26/2000
• Status: Expired due to Term

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Mar, Monte, Snyder, Warren, Kutz, Harold
• Primary Examiner(s): Auve, Glenn A.
• Assistant Examiner(s): Mason, Donna K.
• Application Number:
  US09/893,050
• Time in Patent Office: 1,645 Days
• Field of Search: 710/317, 710/316, 710/8, 710/104, 257/666, 257/676, 257/E23.011, 257/E23.032, 257/E23.079, 326/38, 326/41, 713/100, 340/825, 712/247
• US Class Current: 710/317
• CPC Class Codes: G06F 13/4022 using switching circuits, e.g. switching matrix, connection or expansion network G06F13/4009 takes precedence
• CPC Class Codes: G06F 13/4072 Drivers or receivers G06F13/4086 takes precedence; for multistate logic circuits H03K19/0002

Abstract

A circuit arrangement permits a microcontroller wirebond pad to be configured to be an analog or digital input or output. The circuit arrangement uses any of a plurality of switching configurations to selectively determine the use of the wirebond pad under control of the microcontroller'"'"'s processor. The microcontroller can be configured using configurable analog and configurable digital blocks to perform any of a plurality of functions with certain of the pinouts determined under program control.

Claims

1. A microcontroller, comprising:

a circuit comprising an analog circuit and a digital circuit wherein said analog circuit comprises a dedicated analog input and a dedicated analog output and said digital circuit comprises a dedicated digital input and a dedicated digital output;

a wirebond pad;

a processor; and

a user selectable switching circuit that selectively connects at least one of said dedicated analog input, said dedicated analog output, said dedicated digital input and said dedicated digital output to the wirebond pad under control of the processor after packaging of said circuit.

2. The microcontroller according to claim 1, wherein the analog circuit comprises a configurable analog circuit block.

3. The microcontroller according to claim 1, wherein the digital circuit comprises a configurable digital circuit block.

4. The microcontroller according to claim 1, wherein the switching circuit comprises a tristate analog buffer amplifier coupling the dedicated analog output to the wirebond pad, and wherein the dedicated analog output is switched by tristate control of the tristate analog buffer amplifier.

5. The microcontroller according to claim 1, wherein the switching circuit comprises an analog buffer amplifier in series with an analog switch coupling the dedicated analog output to the wirebond pad, and wherein the dedicated analog output is switched by the analog switch.

6. The microcontroller according to claim 1, wherein the switching circuit comprises an analog switch coupling the dedicated analog output to the wirebond pad, and wherein the dedicated analog output is switched by the analog switch.

7. The microcontroller according to claim 1, wherein the switching circuit comprises an analog switch coupling the dedicated analog input to the wirebond pad, and wherein the dedicated analog input is switched by the analog switch.

8. The microcontroller according to claim 1, wherein the switching circuit comprises a tristate analog buffer amplifier coupling the dedicated analog input to the wirebond pad, and wherein the dedicated analog input is switched by tristate control of the tristate analog buffer amplifier.

9. The microcontroller according to claim 1, wherein the switching circuit comprises a tristate logic gate coupling the dedicated digital output to the wirebond pad, and wherein the dedicated digital output is switched by tristate control of the tristate logic gate.

10. The microcontroller according to claim 9, wherein the tristate logic gate comprises an inverter.

11. The microcontroller according to claim 9, wherein the tristate logic gate comprises a buffer.

12. The microcontroller according to claim 1, wherein the switching circuit comprises a multiple input logic gate coupling the dedicated digital output to the wirebond pad, and wherein the dedicated digital output is switched by an input to the multiple input logic gate.

13. The microcontroller according to claim 12, wherein the multiple input logic gate comprises a NAND gate.

14. The microcontroller according to claim 1, wherein the switching circuit comprises a tristate logic gate coupling the dedicated digital input to the wire bond pad, and wherein the digital input is switched by tristate control of the tristate logic gate.

15. The microcontroller according to claim 14, wherein the tristate logic gate comprises an inverter.

16. The microcontroller according to claim 14, wherein the tristate logic gate comprises a buffer.

17. The microcontroller according to claim 1, wherein the switching circuit comprises a multiple input logic gate coupling the dedicated digital output to the wirebond pad, and wherein the dedicated digital output is switched by an input to the multiple input logic gate.

18. The microcontroller according to claim 17, wherein the multiple input logic gate comprises a NAND gate.

19. The microcontroller according to claim 1, wherein the switching circuit comprises an isolation resistor isolating the wirebond pad from one of a digital input, an analog input and analog output.