Nonvolatile magnetic memory device and manufacturing method thereof

• US 6,982,446 B2
• Filed: 12/31/2003
• Issued: 01/03/2006
• Est. Priority Date: 01/06/2003
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Motoyoshi, Makoto
• Primary Examiner(s): Le, Thao P.
• Application Number:
  US10/750,263
• Publication Number:
  US 20040157427A1
• Time in Patent Office: 734 Days
• Field of Search: 438/622
• US Class Current: 257/295
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H10B 61/22 of the field-effect transistor [FET] type

Abstract

An TMR-type MRAM comprising a transistor for selection; a first connecting hole; a first wiring (write-in word line); a second insulating interlayer covering a first insulating interlayer and the first wiring; a TRM device formed on the second insulating interlayer; a second wiring (bit line) formed on a third insulating interlayer; and a second connecting hole formed through the second insulating interlayer and connected to the first connecting hole, in which an end face of an extending portion of the other end of the TRM device is in contact with the second connecting hole.

Claims

1. A nonvolatile magnetic memory device comprising;

(a) a transistor for selection, formed in a semiconductor substrate,

(b) a first insulating interlayer covering the transistor for selection,

(c) a first connecting hole formed in a first opening portion formed through the first insulating interlayer, and connected to the transistor for selection,

(d) a first wiring being formed on the first insulating interlayer and extending in a first direction,

(e) a second insulating interlayer covering the first insulating interlayer and the first wiring,

(f) a tunnel magnetoresistance device being formed on the second insulating interlayer and comprising a tunnel barrier and two ferromagnetic layers, said tunnel barrier being sandwiched between said two ferromagnetic layers, one of the ferromagnetic layers including an anti-ferromagnetic layer and a pinned magnetic layer,

(g) a third insulating interlayer covering the tunnel magnetoresistance device and the second insulating interlayer,

(h) a second wiring being formed on the third insulating interlayer, being electrically connected to one end of the tunnel magnetoresistance device and extending in a second direction different from the first direction, and

(i) a second connecting hole formed in a second opening portion formed through the second insulating interlayer, and connected to the first connecting hole,

in which an end face of an extending portion of the anti-ferromagnetic layer but not the pinned magnetic layer is in contact with the second connecting hole.