Fast path caching

• US 6,986,015 B2
• Filed: 08/13/2002
• Issued: 01/10/2006
• Est. Priority Date: 12/10/2001
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: Incipient Inc.
• Inventors: Testardi, Richard
• Primary Examiner(s): Vital, Pierre M.
• Application Number:
  US10/218,192
• Publication Number:
  US 20030140209A1
• Time in Patent Office: 1,246 Days
• Field of Search: 711/118, 711/121, 711/133, 711/136, 711/152, 711/163, 711/202, 711/203, 711/206, 711/208, 711/173, 710/3, 710/38, 710/316
• US Class Current: 711/202
• CPC Class Codes: G06F 12/0871 Allocation or management of cache space
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 2003/0697 device management, e.g. handlers, drivers, I/O schedulers
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0635 by changing the path, e.g. traffic rerouting, path reconfiguration
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0664 at device level, e.g. emulation of a storage device or system
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

Described are techniques used in a computer system for handling data operations to storage devices. A switching fabric includes one or more fast paths for handling lightweight, common data operations and at least one control path for handling other data operations. A control path manages one or more fast paths. The fast path and the control path are utilized in mapping virtual to physical addresses using mapping tables. The mapping tables include an extent table of one or more entries corresponding to varying address ranges. The size of an extent may be changed dynamically in accordance with a corresponding state change of physical storage. The fast path may cache only portions of the extent table as needed in accordance with a caching technique. The fast path may cache a subset of the extent table stored within the control path. A set of primitives may be used in performing data operations. A locking mechanism is described for controlling access to data shared by the control paths.

Claims

1. A method executed in a computer system for performing virtual to physical address translation comprising:

determining mapping tables used in performing said address translation, said mapping tables including an extent table corresponding to a logical block address range and a storage redirect table including physical storage location information associated with said logical block address range, said extent table being divided into a plurality of portions;

if an associated data operation meets predetermined criteria, using a fast path in performing said virtual address translation independent of at least one of a general control path and another fast path, and otherwise using a general control path; and

loading into a memory local to said fast path a portion of said extent table corresponding to a current data operation, said portion of said extent table being included in a memory managed using a cache management technique.

2. The method of claim 1, wherein said cache management technique selects a portion of said table to remove in accordance with one of a least recently used policy, a random policy and a sequential policy.

3. The method of claim 1, wherein said cache management technique uses a window size in accordance with a working set.

4. The method of claim 1, wherein a general control path performs said address translation if not performed by said fast path, and the method further comprising:

loading said portion of said extent table in memory local to the fast path using a copy of said extent table included in other memory managed by said general control path.

5. The method of claim 1, further comprising:

determining by a general control path at least one processing operation to be performed in connection with completing an incoming operation; and

authorizing, by said general control path, at least one fast path to each perform one of said at least one processing operation, each of said at least one fast path operating independent of other fast paths.

6. The method of claim 5, wherein said at least one fast path continues performing using data in its local cache until authority of said at least one fast path is revoked by said general control path.

7. The method of claim 6, further comprising:

said general control path revoking said authority of said at least one fast path by invalidating data included in said local cache of said fast path.

8. The method of claim 6, further comprising:

receiving, by said at least one fast path, a message from said general control path invalidating data included in said local cache of said fast path;

said at least one fast path continuing processing of a current I/O operation; and

sending an acknowledgement by said at least one fast path to said general control path after completion of said current I/O operation, said acknowledgement indicating that said at least one fast path has acknowledged revocation of its current authority by said general control path.

9. The method of claim 1, further comprising:

using an application programming interface between said fast path and a general control path in order for said fast path to obtain said portion from a general control path associated with said fast path.

10. A computer program product that performs virtual to physical address translation comprising:

machine executable code that determines mapping tables used in performing said address translation, said mapping tables including an extent table corresponding to a logical block address range and a storage redirect table including physical storage location information associated with said logical block address range, said extent table being divided into a plurality of portions;

machine executable code that, if an associated data operation meets predetermined criteria, uses a fast path in performing said virtual address translation independent of at least one of a general control path and another fast path, and otherwise using a general control path; and

machine executable code that loads into a memory local to said fast path a portion of said extent table corresponding to a current data operation, said portion of said extent table being included in a memory managed using a cache management technique.

11. The computer program product of claim 10, wherein said cache management technique selects a portion of said table to remove in accordance with one of a least recently used policy, a random policy and a sequential policy.

12. The computer program product of claim 10, wherein said cache management technique uses a window size in accordance with a working set.

13. The computer program product of claim 10, wherein a general control path performs said address translation if not performed by said fast path, and the computer program product further comprising:

machine executable code that loads said portion of said extent table in memory local to the fast path using a copy of said extent table included in other memory managed by said general control path.

14. The computer program product of claim 10, further comprising:

machine executable code that determines by a general control path at least one processing operation to be perfonned in connection with completing an incoming operation; and

machine executable code that authorizes, by said general control path, at least one fast path to each perform one of said at least one processing operation, each of said at least one fast path operating independent of other fast paths.

15. The computer program product of claim 14, wherein said at least one fast path continues performing using data in its local cache until authority to said at least one fast path is revoked by said general control path.

16. The computer program product of claim 15, further comprising:

machine executable code included in said general control path that revokes said authority of said at least one fast path by invalidating data included in said local cache of said fast path.

17. The computer program product of claim 15, further comprising:

machine executable code that receives, by said at least one fast path, a message from said general control path invalidating data included in said local cache of said fast path, said at least one fast path continuing processing of a current I/O operation; and

machine executable code path sends an acknowledgement by said at least one fast path to said general control path after completion of said current I/O operation, said acknowledgement indicating that said at least one fast path has acknowledged revocation of its current authority by said general control path.

18. The computer program product of claim 10, further comprising:

machine executable code that uses an application programming interface between said fast path and a general control path in order for said fast path to obtain said portion from a general control path associated with said fast path.