Apparatus, method, system and executable module for configuration and operation of adaptive integrated circuitry having fixed, application specific computational elements

• US 6,986,021 B2
• Filed: 11/30/2001
• Issued: 01/10/2006
• Est. Priority Date: 11/30/2001
• Status: Expired due to Term

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: QuickSilver Technology
• Inventors: Master, Paul L., Smith, Stephen J., Watson, John
• Primary Examiner(s): Treat, William M.
• Application Number:
  US09/997,987
• Publication Number:
  US 20030105949A1
• Time in Patent Office: 1,502 Days
• Field of Search: 712/15
• US Class Current: 712/15
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: G06F 15/80 comprising an array of processing units with common control, e.g. single instruction multiple data processors G06F15/82 takes precedence ; for correlation function computation G06F17/15
• CPC Class Codes: G06F 7/57 Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations G06F7/49, G06F7/491 take precedence
• CPC Class Codes: G06F 9/44505 Configuring for program initiating, e.g. using registry, configuration files
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The present invention concerns configuration of a new category of integrated circuitry for adaptive or reconfigurable computing. The various embodiments provide an executable information module for an adaptive computing engine (ACE) integrated circuit to provide an operating mode. The preferred executable information modules include configuration information interleaved with operand data, and may also include routing and power control information. The preferred ACE IC includes a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative in real-time to configure and reconfigure the plurality of heterogeneous computational elements for a plurality of different functional modes, including linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, memory operations, and bit-level manipulations.

Claims

1. A system for configuring and operating an adaptive circuit, the system comprising:

a first routable and executable information module, the module having first configuration information and second configuration information, the module further having first operand data and second operand data, the module further having a first routing sequence for routing;

a plurality of heterogeneous computational elements, the plurality of heterogeneous computational elements designated by the first routing sequence of the first executable information module, a first computational element of the plurality of heterogeneous computational elements having a first fixed architecture and a second computational element of the plurality of heterogeneous computational elements having a second fixed architecture, the first fixed architecture being different than the second fixed architecture; and

an interconnection network coupled to the plurality of heterogeneous computational elements, the interconnection network capable of selectively providing the module to the plurality of heterogeneous computational elements, the interconnection network further capable of configuring and providing the first operand data to the plurality of heterogeneous computational elements for a first functional mode of a plurality of functional modes in response to the first configuration information, and the interconnection network further capable of reconfiguring and providing the second operand data to the plurality of heterogeneous computational elements for a second functional mode of the plurality of functional modes in response to the second configuration information, the first functional mode being different than the second functional mode.

2. The system of claim 1, wherein the first routable and executable information module provides a first system operating mode.

3. The system of claim 2, further comprising:

a second routable and executable information module, the second routable and executable information module providing a second system operating mode, the second routable and executable information module further having the first routing sequence for routing to the plurality of heterogeneous computational elements.

4. The system of claim 1, further comprising:

a memory coupled to the plurality of heterogeneous computational elements and to the interconnection network, the memory capable of storing the first configuration information and the second configuration information.

5. The system of claim 1, wherein the first configuration information and the second configuration information are stored in a second plurality of heterogeneous computational elements configured for a memory functional mode.

6. The system of claim 1, wherein the first configuration information and the second configuration information are stored as a configuration of the plurality of heterogeneous computational elements.

7. The system of claim 1, wherein the first routable and executable information module is stored in a machine-readable medium.

8. The system of claim 1, wherein the first routable and executable information module is transmitted through an air interface.

9. The system of claim 1, wherein the first routable and executable information module is transmitted through a wireline interface.

10. The system of claim 1, wherein the first routable and executable information module is embodied as a plurality of discrete information data packets.

11. The system of claim 1, wherein the first routable and executable information module is embodied as a stream of information data bits.

12. The system of claim 1, wherein the first fixed architecture and the second fixed architecture are selected from a plurality of specific architectures, the plurality of specific architectures comprising at least two of the following corresponding functions:

memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, routing, control, input, output, and field programmability.

13. The system of claim 1, wherein the plurality of functional modes comprises at least two of the following functional modes:

linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, controller operations, memory operations, and bit-level manipulations.

14. The system of claim 1, further comprising:

a controller coupled to the plurality of heterogeneous computational elements and to the interconnection network, the controller capable of coordinating the configuration of the plurality of heterogeneous computational elements for the first functional mode with the first operand data and further coordinating the reconfiguration of the plurality of heterogeneous computational elements for the second functional mode with the second operand data.

15. The system of claim 1, further comprising:

a second plurality of heterogeneous computational elements coupled to the interconnection network, the second plurality of heterogeneous computational elements configured for a controller operating mode, the second plurality of heterogeneous computational elements capable of coordinating the configuration of the plurality of heterogeneous computational elements for the first functional mode with the first operand data and further coordinating the reconfiguration of the plurality of heterogeneous computational elements for the second functional mode with the second operand data.

16. The system of claim 1, wherein the system is embodied within a mobile station having a plurality of operating modes, the plurality of operating modes comprising at least two of the following modes:

a mobile telecommunication mode, a personal digital assistance mode, a multimedia reception mode, a mobile packet-based communication mode, and a paging mode.

17. The system of claim 1, wherein the system is embodied within a server having a plurality of operating modes.

18. The system of claim 1, wherein the system is embodied within an adjunct network entity having a plurality of operating modes.

19. The system of claim 1, wherein the plurality of heterogeneous computational elements are configured to generate a request for a second routable and executable information module, the second routable and executable information module providing a second system operating mode.

20. The system of claim 1, wherein the system is embodied within an integrated circuit.

21. The system of claim 1, wherein the first routing sequence is coupled to the first configuration information to provide routing of the first configuration information within the interconnection network and wherein the first routable and executable information module further comprises:

a second routing sequence coupled to the second configuration information to provide selective routing of the second configuration information within the interconnection network to the plurality of heterogeneous computational elements, the second routing sequence being identical to the first routing sequence.

22. The system of claim 1, wherein the first executable information module further comprises:

a power control sequence to direct the interconnection network to not provide a clock signal to a selected heterogeneous computational element of the plurality of heterogeneous computational elements.

23. The system of claim 1, wherein the first executable information module further comprises:

an iteration control sequence to direct a temporal continuation of a selected configuration of the plurality of heterogeneous computational elements.

24. The system of claim 1, wherein the first configuration information is a reference to a previously stored configuration sequence.

25. The system of claim 1, wherein a first portion of the plurality of heterogeneous computational elements are operating in the first functional mode while a second portion of the plurality of heterogeneous computational elements are being configured for the second functional mode.

26. A system for operating an adaptive and reconfigurable integrated circuit, the system comprising:

means for providing a first configuration sequence to configure a selected plurality of heterogeneous computational elements to form a first computational unit for the performance of a first selected function;

means for providing a second configuration sequence to reconfigure the selected plurality of heterogeneous computational elements to form a second computational unit for the performance of a second selected function;

means for self-routing the first configuration sequence and the second configuration sequence to the selected plurality of heterogeneous computational elements, the selected plurality of heterogeneous computational elements designated by a first routing sequence;

means for providing first operand data to the first computational unit for the performance of the first selected function; and

means for providing second operand data to the second computational unit for the performance of the second selected function.

27. The system of claim 26, further comprising:

means for coordinating timing of the configuration of the plurality of heterogeneous computational elements to precede reception of the first operand data to be utilized in the performance of the first selected function.

28. The system of claim 26, further comprising:

means for maintaining the configuration of the plurality of heterogeneous computational elements for a repetition of the performance of the first selected function.

29. The system of claim 26, further comprising:

means for inserting a configuration reference into a received data stream.

30. The system of claim 26, further comprising:

means for inserting a power control reference into a received data stream.

31. A routable and executable information module for operating an adaptive system, the adaptive system including a plurality of computational elements having a corresponding plurality of fixed and differing architectures, the adaptive system further including an interconnect network responsive to configure the plurality of computational elements for a plurality of operating modes, the module comprising:

a plurality of information sequences;

wherein a first information sequence of the plurality of information sequences provides a first configuration sequence to direct a first configuration of the plurality of computational elements;

wherein a second information sequence of the plurality of information sequences provides first operand data to the first configuration of the plurality of computational elements; and

wherein a third information sequence of the plurality of information sequences provides routing information for selective routing of the first information sequence and the second information sequence to the plurality of computational elements.

32. The module of claim 31, wherein the first information sequence is a configuration specification.

33. The module of claim 31, wherein the first information sequence is a reference to a stored configuration specification.

34. The module of claim 31, wherein the first information sequence, the second information sequence and the third information sequence have a discrete packet form.

35. The module of claim 31, wherein the first information sequence, the second information sequence and the third information sequence have a continuous stream form.

36. The module of claim 31, further comprising:

a fourth information sequence of the plurality of information sequences, the fourth information sequence providing power control for a selected computational element.

37. The module of claim 31, further comprising:

a fifth information sequence of the plurality of information sequences, the fifth information sequence providing instantiation duration control for a configuration of computational elements.

38. The module of claim 31, further comprising:

a sixth information sequence of the plurality of information sequences, the sixth information sequence providing security control for a configuration of computational elements.

39. A method for adaptive configuration and operation, the method comprising:

receiving a first routable and executable information module, the module having a first routing sequence, first configuration information and second configuration information, the module further having first operand data and second operand data;

using the first routing sequence, selectively routing the first configuration information and the first operand data to a plurality of heterogeneous computational elements;

in response to the first configuration information, configuring and providing the first operand data to the plurality of heterogeneous computational elements for a first functional mode of a plurality of functional modes, a first computational element of the plurality of heterogeneous computational elements having a first fixed architecture and a second computational element of the plurality of heterogeneous computational elements having a second fixed architecture, the first fixed architecture being different than the second fixed architecture; and

in response to the second configuration information, reconfiguring and providing the second operand data to the plurality of heterogeneous computational elements for a second functional mode of the plurality of functional modes, the first functional mode being different than the second functional mode.

40. The method of claim 39, wherein the first routable and executable information module provides a first operating mode.

41. The method of claim 40, further comprising:

receiving a second routable and executable information module, the second executable information module providing a second operating mode; and

selectively routing the second routable and executable information module to the plurality of heterogeneous computational elements.

42. The method of claim 39, further comprising:

operating a first portion of the plurality of heterogeneous computational elements in the first functional mode while configuring a second portion of the plurality of heterogeneous computational elements for the second functional mode.

43. The method of claim 39, further comprising:

storing the first routable and executable information module in a memory.

44. The method of claim 39, further comprising:

storing the first routable and executable information module in a second plurality of heterogeneous computational units configured for a memory functional mode.

45. The method of claim 39, further comprising:

storing the first configuration information as a configuration of the plurality of heterogeneous computational units.

46. The method of claim 39, further comprising:

storing the first routable and executable information module in a machine-readable medium.

47. The method of claim 39, wherein the first routable and executable information module is received through an air interface.

48. The method of claim 39, wherein the first routable and executable information module is received through a wireline interface.

49. The method of claim 39, wherein the first routable and executable information module is embodied as a plurality of discrete information data packets.

50. The method of claim 39, wherein the first routable and executable information module is embodied as a stream of information data bits.

51. The method of claim 39, wherein the first fixed architecture and the second fixed architecture are selected from a plurality of specific architectures, the plurality of specific architectures comprising at least two of the following corresponding functions:

memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, routing, and field programmability.

52. The method of claim 39, wherein the plurality of functional modes comprises at least two of the following functional modes:

linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, controller operations, memory operations, and bit-level manipulations.

53. The method of claim 39, further comprising:

coordinating the configuration of the plurality of heterogeneous computational elements for the first functional mode with the first operand data and coordinating the reconfiguration of the plurality of heterogeneous computational elements for the second functional mode with the second operand data.

54. The method of claim 39, wherein the method is operable within a mobile station having a plurality of operating modes, the plurality of operating modes comprising at least two of the following modes:

a mobile telecommunication mode, a personal digital assistance mode, a multimedia reception mode, a mobile packet-based communication mode, and a paging mode.

55. The method of claim 39, wherein the method is operable within a server having a plurality of operating modes.

56. The method of claim 39, wherein the method is operable within an adjunct network entity having a plurality of operating modes.

57. The method of claim 39, further comprising:

configuring the plurality of heterogeneous computational elements to generate a request for a second routable and executable information module, the second routable and executable information module providing a second operating mode.

58. The method of claim 39, wherein the method is operable within an integrated circuit.

59. The method of claim 39, further comprising:

using a second routing sequence, selectively routing the second configuration information and the second operand data to the plurality of heterogeneous computational elements, the second routing sequence identical to the first routing sequence.

60. The method of claim 39, wherein the first routable and executable information module further comprises:

a power control sequence to direct the interconnection network to not provide a clock signal to a selected heterogeneous computational element of the plurality of heterogeneous computational elements.

61. The method of claim 39, wherein the first routable and executable information module further comprises:

an iteration control sequence to direct a temporal continuation of a selected configuration of the plurality of heterogeneous computational elements.

62. The method of claim 39, wherein the first configuration information is a reference to a previously stored configuration sequence.

65. The method of claim 59, further comprising:

transmitting a second routable and executable information module, the second executable information module providing a second operating; and

selectively routing configuration information of the second routable and executable information module to the plurality of heterogeneous computational elements.

63. A method for adaptive configuration, the method comprising:

transmitting a first routable and executable information module, the module having a first routing sequence, first configuration information and second configuration information, the module further having first operand data and second operand data;

using the first routing sequence, selectively routing the first configuration information and the first operand data to a plurality of heterogeneous computational elements;

wherein when a first executable information module is received, configuring and providing the first operand data to the plurality of heterogeneous computational elements for a first functional mode of a plurality of functional modes in response to the first configuration information, and reconfiguring and providing the second operand data to the plurality of heterogeneous computational elements for a second functional mode of the plurality of functional modes in response to the second configuration information, the first functional mode being different than the second functional mode; and

wherein a first computational element of the plurality of heterogeneous computational elements has a first fixed architecture and a second computational element of the plurality of heterogeneous computational elements has a second fixed architecture, the first fixed architecture being different than the second fixed architecture.

64. The method of claim 63, wherein the first routable and executable information module provides a first operating mode.

66. The method of claim 63, further comprising:

accessing the first routable and executable information module in a memory.

67. The method of claim 63, further comprising:

accessing the first routable and executable information module in a second plurality of heterogeneous computational units configured for a memory functional mode.

68. The method of claim 63, further comprising:

accessing the first routable and executable information module in a machine-readable medium.

69. The method of claim 63, wherein the first routable and executable information module is transmitted through an air interface.

70. The method of claim 63, wherein the first routable and executable information module is transmitted through a wireline interface.

71. The method of claim 63, wherein the first routable and executable information module is embodied as a plurality of discrete information data packets.

72. The method of claim 63, wherein the first routable and executable information module is embodied as a stream of information data bits.

73. The method of claim 63, wherein the first fixed architecture and the second fixed architecture are selected from a plurality of specific architectures, the plurality of specific architectures comprising at least two of the following corresponding functions:

memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability.

74. The method of claim 63, wherein the plurality of functional modes comprises at least two of the following functional modes:

linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, memory operations, and bit-level manipulations.

75. The method of claim 63, wherein the method is operable within a base station having a plurality of operating modes.

76. The method of claim 63, wherein the method is operable within a server having a plurality of operating modes.

77. The method of claim 63, wherein the method is operable within an adjunct network entity having a plurality of operating modes.

78. The method of claim 63, wherein the method is operable within an integrated circuit.

79. The method of claim 63, wherein the method is operable within a local area network.

80. The method of claim 63, wherein the method is operable within a wide area network.

81. The method of claim 63, wherein the method is operable within a wireline transmitter.

82. The method of claim 63, further comprising:

receiving a request for transmission of a second routable and executable information module, the second routable and executable information module providing a second operating mode.

83. The method of claim 63, further comprising:

using a second routing sequence, selectively routing the second configuration information and the second operand data to the plurality of heterogeneous computational elements, the second routing sequence identical to the first routing sequence.

84. The method of claim 63, wherein the first routable and executable information module further comprises:

a power control sequence to direct that a clock signal not be provided to a selected heterogeneous computational element of the plurality of heterogeneous computational elements.

85. The method of claim 63, wherein the first routable and executable information module further comprises:

an iteration control sequence to direct a temporal continuation of a selected configuration of the plurality of heterogeneous computational elements.

86. The method of claim 63, wherein the first configuration information is a reference to a previously stored configuration sequence.

87. An adaptive integrated circuit, comprising:

routable configuration information and operand data;

a plurality of fixed and differing computational elements; and

an interconnection network coupled to the plurality of fixed and differing computational elements, the interconnection network adapted to use a routing sequence to selectively route the configuration information and operand data to the plurality of fixed and differing computational elements, the interconnection network further adapted to configure the plurality of fixed and differing computational elements for a plurality of functional modes in response to the configuration information.

88. The adaptive integrated circuit of claim 87, wherein the configuration information provides an operating mode for use of the operand data.

89. The adaptive integrated circuit of claim 87, wherein the plurality of functional modes comprises at least two of the following functional modes:

linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, controller operations, memory operations, and bit-level manipulations.

90. The adaptive integrated circuit of claim 87, wherein the configuration information is stored in a portion of the plurality of fixed and differing computational elements configured for a memory functional mode.

91. The adaptive integrated circuit of claim 87, wherein the configuration information is stored as a configuration of the plurality of fixed and differing computational elements.

92. The adaptive integrated circuit of claim 87, wherein the plurality of fixed and differing computational elements are selected from a plurality of specific architectures, the plurality of specific architectures comprising at least two of the following corresponding functions:

memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability.

93. The adaptive integrated circuit of claim 87, wherein the plurality of fixed and differing computational elements are configured to identify and select the configuration information from a singular bit stream containing the operand data commingled with the configuration information.

94. The adaptive integrated circuit of claim 87, wherein the routing sequence is coupled to the configuration information to provide the selective routing of the configuration information.

95. The adaptive integrated circuit of claim 87, further comprising:

a power control sequence to direct that a clock signal not be provided to a selected heterogeneous computational element of the plurality of heterogeneous computational elements.

96. The adaptive integrated circuit of claim 87, further comprising:

an iteration control sequence to direct a temporal continuation of a selected configuration of the plurality of heterogeneous computational elements.

97. The adaptive integrated circuit of claim 87, wherein the configuration information is a reference to a previously stored configuration sequence.

98. An adaptive integrated circuit, comprising:

a plurality of executable information modules, a first executable information module of the plurality of executable information modules and a second executable information module of the plurality of executable information modules each having corresponding operand data and corresponding routing sequences;

a plurality of reconfigurable matrices, the plurality of reconfigurable matrices including a plurality of heterogeneous computation units, each heterogeneous computation unit of the plurality of heterogeneous computation units formed from a selected configuration, of a plurality of configurations, of a plurality of fixed computational elements, the plurality of fixed computational elements including a first computational element having a first architecture and a second computational element having a second architecture, the first architecture distinct from the second architecture, the plurality of heterogeneous computation units coupled to an interconnect network and reconfigurable in response to the plurality of executable information modules; and

a matrix interconnection network coupled to the plurality of reconfigurable matrices, the matrix interconnection network capable of using the corresponding routing sequences to selectively route the plurality of executable information modules among the plurality of reconfigurable matrices, the matrix interconnection network further capable of configuring the plurality of reconfigurable matrices in response to the first executable information module for a first operating mode and providing corresponding operand data to the plurality of reconfigurable matrices for the first operating mode, and capable of reconfiguring the plurality of reconfigurable matrices in response to the second executable information module for a second operating mode and providing corresponding operand data to the plurality of reconfigurable matrices for the second operating mode.

99. The adaptive integrated circuit of claim 98, further comprising:

a controller coupled to the plurality of reconfigurable matrices, the controller capable of providing the plurality of executable information modules to the reconfigurable matrices and to the matrix interconnection network.

100. A system for operating an adaptive and reconfigurable integrated circuit, the system comprising:

means for spatially configuring and reconfiguring a plurality of computational elements to form a first plurality of configured computational elements for the performance of a first plurality of selected functions in response to first configuration information;

means for temporally configuring the plurality of computational elements to form a second plurality of configured computational elements for the performance of a second plurality of selected functions in response to second configuration information;

means for selectively routing the first and second configuration information to the plurality of computational elements using a plurality of routing sequences correspondingly coupled to the first and second configuration information;

means for providing data to the first and second pluralities of configured computational elements; and

means for coordinating the spatial and temporal configurations of the plurality of computational elements with the provision of the data to the first and second pluralities of configured computational elements.

101. An adaptive integrated circuit, comprising:

a first executable information module, the module having first configuration information and second configuration information, the module further having first operand data and second operand data;

a plurality of heterogeneous computational elements, a first computational element of the plurality of heterogeneous computational elements having a first fixed architecture and a second computational element of the plurality of heterogeneous computational elements having a second fixed architecture, the first fixed architecture being different than the second fixed architecture;

an interconnection network coupled to the plurality of heterogeneous computational elements, the interconnection network capable of configuring the plurality of heterogeneous computational elements for a first functional mode of a plurality of functional modes in response to the first configuration information, and capable of providing the first operand data to the plurality of heterogeneous computational elements for the first operating mode, and the interconnection network further capable of reconfiguring the plurality of heterogeneous computational elements for a second functional mode of the plurality of functional modes in response to the second configuration information, the first functional mode being different than the second functional mode, and capable of providing the second operand data to the plurality of heterogeneous computational elements for the second operating mode;

wherein a first subset of the plurality of heterogeneous computational elements is configured for a controller operating mode, the controller operating mode comprising at least two of the following corresponding functions;

directing configuration and reconfiguration of the plurality of heterogeneous computational elements, selecting the first configuration information and the second configuration information from the first executable information module, and coordinating the configuration and reconfiguration of the plurality of heterogeneous computational elements with respective first operand data and second operand data; and

wherein a second subset of the plurality of heterogeneous computational elements is configured for a memory operating mode for storing the first configuration information and the second configuration information.

102. An adaptive integrated circuit, comprising:

a first executable information module, the module having first configuration information and second configuration information, the module further having first operand data and second operand data, the module further having a first routing sequence for routing;

a plurality of heterogeneous computational elements, the plurality of heterogeneous computational elements designated by the first routing sequence of the first executable information module, a first computational element of the plurality of heterogeneous computational elements having a first fixed architecture of a plurality of fixed architectures and a second computational element of the plurality of heterogeneous computational elements having a second fixed architecture of the plurality of fixed architectures, the first fixed architecture being different than the second fixed architecture, and the plurality of fixed architectures comprising at least two of the following corresponding functions;

memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability; and

an interconnection network coupled to the plurality of heterogeneous computational elements, the interconnection network capable of selectively providing the module to the plurality of heterogeneous computational elements, the interconnection network capable of configuring the plurality of heterogeneous computational elements for a first functional mode of a plurality of functional modes in response to the first configuration information, the interconnection network further capable of reconfiguring the plurality of heterogeneous computational elements for a second functional mode of the plurality of functional modes in response to the second configuration information, the first functional mode being different than the second functional mode, and the plurality of functional modes comprising at least two of the following functional modes;

linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, memory operations, and bit-level manipulations, and the interconnection network further capable of respectively providing first operand data and second operand data to the plurality of heterogeneous computational elements for the first functional mode and for the second functional mode.

103. An adaptive integrated circuit, comprising:

a routable and executable information module, the module having a first routing sequence, first configuration information and second configuration information, the module further having operand data;

a plurality of fixed and differing computational elements; and

an interconnection network coupled to the plurality of fixed and differing computational elements, the interconnection network capable of using the first routing sequence to selectively provide the module to the plurality of fixed and differing computational elements, the interconnection network further capable of responding to the first configuration information to configure the plurality of fixed and differing computational elements to have an operating system, the operating system further capable of controlling, routing and timing configuration of the plurality of fixed and differing computational elements for a plurality of functional modes in response to the second configuration information, the plurality of functional modes capable of utilizing the operand data.

104. The adaptive integrated circuit of claim 103, wherein the operating system is further operative to generate third configuration information.