Trench MOSFET with increased channel density
First Claim
1. A method for forming a semiconductor device having a major surface, comprising:
- providing a semiconductor material body having a trench with a vertical sidewall, wherein the trench extends from the major surface to a depth within the semiconductor material body;
forming a gate structure having a top surface within the trench, wherein the top surface of the gate structure is below the major surface;
forming a source region along the vertical sidewall of the trench, wherein a vertical depth of the source region along the vertical sidewall is greater than a horizontal width of the source region along the major surface of the semiconductor material body; and
forming a conductive electrode layer adjacent the vertical sidewall of the trench above the gate structure and below the major surface making contact with the source region along a portion of the vertical sidewall.
6 Assignments
0 Petitions
Accused Products
Abstract
A MOSFET device (50) has a trench (60) extending from a major surface (56) of the device (50). Within the trench (60), a gate structure (62) is formed where the top surface (64) is below the major surface (56). Source regions (66, 68) are formed along a vertical wall (84) inside of the trench (60). The source regions (66, 68) have a horizontal component along the major surface (56) and a vertical component extending the vertical wall (84). The majority of the source regions (66, 68) are formed along the vertical wall (84) within the trench (60). A typical aspect ratio of the vertical length of the source regions (66, 68) to the horizontal width is greater than 3:1. An Inter-layer dielectric (ILD) layer (74) is formed on the gate structure (62) within the trench (60) below the major surface (56). A metal electrode layer (82) is formed above the major surface (56) where a portion is formed inside the trench (60) making source contact to the source regions (66, 68) inside the trench (60) along the vertical wall (84) of the trench (60).
-
Citations
20 Claims
-
1. A method for forming a semiconductor device having a major surface, comprising:
-
providing a semiconductor material body having a trench with a vertical sidewall, wherein the trench extends from the major surface to a depth within the semiconductor material body; forming a gate structure having a top surface within the trench, wherein the top surface of the gate structure is below the major surface; forming a source region along the vertical sidewall of the trench, wherein a vertical depth of the source region along the vertical sidewall is greater than a horizontal width of the source region along the major surface of the semiconductor material body; and forming a conductive electrode layer adjacent the vertical sidewall of the trench above the gate structure and below the major surface making contact with the source region along a portion of the vertical sidewall. - View Dependent Claims (2, 3, 4)
-
-
5. A method of making a semiconductor device comprising the steps of:
-
providing a semiconductor material body having a trench extending from a major surface to a depth within the semiconductor material body; forming a source region vertically along a sidewall of the trench above the gate structure and below the major surface of the semiconductor material body; forming a gate structure within the trench; and forming an interlayer dielectric (ILD) region within the trench above the gate structure and below the major surface of the semiconductor material body. - View Dependent Claims (6, 7, 8, 9)
-
-
10. A process for forming a semiconductor device having a major surface comprising the steps of:
-
providing a first region of semiconductor material having a first conductivity type and a second region of a second conductivity type disposed above the first region; forming a trench extending vertically from the major surface through the second region; forming a third region of the first conductivity type in the second region having a vertical component along the trench, wherein the vertical component of the third region along the trench is greater than a horizontal component of the third region; and forming a conductive electrode layer formed below the major surface making contact to the third region inside the trench along the vertical component of the third region of the semiconductor device. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
-
Specification