Stackable semiconductor package with solder on pads on which second semiconductor package is stacked
First Claim
1. A stackable semiconductor package comprising:
- a substrate comprising a first side surface including metal first circuit patterns, and a second side surface opposite the first side surface and including metal second circuit patterns,wherein each of the first circuit patterns includes a respective one of a plurality of first pads, the first pads are aligned in a plurality of rows, each of the first pads is a lateral distance “
a”
from immediately adjacent ones of said first pads, and at least some of the first circuit patterns are electrically coupled through the substrate to at least some of the second circuit patterns;
a semiconductor die electrically coupled to the first circuit patterns;
an encapsulant covering the semiconductor die and a portion of the first side surface of the substrate,wherein the encapsulant has substantially vertical sidewalls extending a vertical distance “
d”
from the first side surface of the substrate, all of the first pads are external to the encapsulant, and each of the first pads that is immediately adjacent to one of the sidewalls of the encapsulant is a lateral distance “
b”
from the respective sidewall; and
a plurality of layers of a solder,wherein each of the layers of the solder is fused to a respective one of the first pads, and has an exposed exterior surface portion that faces in a same direction as the first side surface of the substrate and extends a maximum vertical distance “
c”
from the first side surface of the substrate,wherein each of the solder layers is adapted to be soldered to a respective solder ball of another semiconductor package that is to be stacked on the stackable semiconductor package over the first side surface of the substrate, andwherein a>
b and c<
d.
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Accused Products
Abstract
A stackable semiconductor package includes a substrate with a first side surface that includes circuit patterns. Each circuit pattern includes a pad. A semiconductor die is electrically coupled to the circuit patterns. An encapsulant covers the semiconductor die and the first side surface of the substrate inward of the pads. A layer of a solder is fused to each of the pads. A lateral distance between immediately adjacent pads is selected to be greater than a lateral distance between sidewalls of the encapsulant and immediately adjacent pads, and a height of the solder layers relative to the first side surface is selected to be less than a height of the sidewalls of the encapsulant, so that misalignment of a semiconductor package stacked on the solder layers/pads is self-correcting when juxtaposed ones of the solder layers and respective solder balls of the second semiconductor package are reflowed and fused together.
101 Citations
24 Claims
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1. A stackable semiconductor package comprising:
-
a substrate comprising a first side surface including metal first circuit patterns, and a second side surface opposite the first side surface and including metal second circuit patterns, wherein each of the first circuit patterns includes a respective one of a plurality of first pads, the first pads are aligned in a plurality of rows, each of the first pads is a lateral distance “
a”
from immediately adjacent ones of said first pads, and at least some of the first circuit patterns are electrically coupled through the substrate to at least some of the second circuit patterns;a semiconductor die electrically coupled to the first circuit patterns; an encapsulant covering the semiconductor die and a portion of the first side surface of the substrate, wherein the encapsulant has substantially vertical sidewalls extending a vertical distance “
d”
from the first side surface of the substrate, all of the first pads are external to the encapsulant, and each of the first pads that is immediately adjacent to one of the sidewalls of the encapsulant is a lateral distance “
b”
from the respective sidewall; anda plurality of layers of a solder, wherein each of the layers of the solder is fused to a respective one of the first pads, and has an exposed exterior surface portion that faces in a same direction as the first side surface of the substrate and extends a maximum vertical distance “
c”
from the first side surface of the substrate,wherein each of the solder layers is adapted to be soldered to a respective solder ball of another semiconductor package that is to be stacked on the stackable semiconductor package over the first side surface of the substrate, and wherein a>
b and c<
d. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An electronic assembly comprising:
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a substrate comprising a first side surface including metal first circuit patterns, wherein each of the first circuit patterns includes a respective one of a plurality of first pads, and the first pads are aligned into at least two parallel rows; a semiconductor die mounted on the first side surface of the substrate and electrically coupled to the first circuit patterns; an enclosure covering the semiconductor die and a portion of the first side surface of the substrate without covering any of the first pads, wherein the enclosure has opposed parallel substantially vertical first and second sidewalls, wherein each of the first and second sidewalls is immediately adjacent to and parallel to a respective one of the rows of the first pads; a plurality of layers of a solder, wherein each of the layers of the solder is fused to a respective one of the first pads and has an exposed exterior surface portion that faces in a same direction as the first side surface of the substrate, the layers of the solder each being adapted to form an electrical connection with a respective solder ball of a semiconductor package to be stacked thereon, and wherein a lateral distance “
a”
between immediately adjacent ones of the first pads, a lateral distance “
b”
between each of the first and second sidewalls and the first pads of the row immediately adjacent to the respective sidewall, a vertical distance “
c”
between the first side surface and an uppermost portion of the exterior surface portion of each of the layers of the solder, and a vertical distance “
d”
between the first side surface and an uppermost edge of each of the first and second sidewalls of the enclosure are selected so that a>
b and d<
d. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. An electronic assembly comprising:
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a substrate comprising a first side surface including metal first circuit patterns, wherein each of the first circuit patterns includes a respective one of a plurality of first pads, and the first pads are aligned into at least two parallel rows; a semiconductor die mounted on the first side surface of the substrate and electrically coupled to the first circuit patterns in a flip chip connection, wherein the semiconductor die has a rectangular perimeter formed by four substantially vertical sidewalls, and at least two of the sidewalls are immediately adjacent to, and parallel to, a respective one of the rows of first pads; a plurality of layers of a solder, wherein each of the layers of the solder is fused to a respective one of the first pads and has an exposed exterior surface portion that faces in a same direction as the first side surface of the substrate, the layers of the solder each being adapted to form an electrical connection with a solder ball of a semiconductor package to be stacked thereon, and wherein a lateral distance “
a”
between immediately adjacent ones of the first pads, a lateral distance “
b”
between each of the first and second sidewalls of the semiconductor die and the first pads of the row immediately adjacent to the respective sidewall, a vertical distance “
c”
between the first side surface and an uppermost portion of the exterior surface portion of each of the layers of the solder, and a vertical distance “
d”
between the first side surface of the substrate and an uppermost edge of each of the sidewalls of the semiconductor die are selected so that a>
b and c<
d. - View Dependent Claims (20, 21, 22, 23, 24)
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Specification