System with functional and selector circuits connected by mode lead
First Claim
1. An electronic system comprising:
- A. a functional circuit having a mode input lead receiving a mode signal to place the functional circuit in one of a functional mode in which the functional circuit operates normally and a test mode in which at least part of the functional circuit is disabled; and
B. a selector circuit having a mode output lead connected to the mode input lead of the functional circuit and having a pair of clock leads separate from the functional circuit, only one of the clock leads at one time receiving a clock signal that controls the state of the mode signal formed on the mode output lead.
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Abstract
A wafer of semiconductor material is processed to form integrated circuit dies. The dies are to be singulated or separated and encapsulated for sale and use as integrated circuits. Before singulation, the dies are tested while still a part of the wafer. Die selector circuits are also formed in the wafer between the dies. The die selector circuits are used to select desired ones of the dies for testing. The die selector circuits have two or four clock signals interconnected with adjacent die selector circuits. The sequence of clock signals specifies the die or dies to be selected for testing. The interconnection of two or four clock signals facilitates testing even if the interconnection of one of more clock signals between die selector circuits is broken or opened.
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Citations
7 Claims
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1. An electronic system comprising:
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A. a functional circuit having a mode input lead receiving a mode signal to place the functional circuit in one of a functional mode in which the functional circuit operates normally and a test mode in which at least part of the functional circuit is disabled; and B. a selector circuit having a mode output lead connected to the mode input lead of the functional circuit and having a pair of clock leads separate from the functional circuit, only one of the clock leads at one time receiving a clock signal that controls the state of the mode signal formed on the mode output lead. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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Specification