Chips with wafer scale caps formed by molding

• US 6,989,292 B2
• Filed: 12/08/2003
• Issued: 01/24/2006
• Est. Priority Date: 01/10/2001
• Status: Expired due to Term

• Current Assignee: Nytell Software LLC (Intellectual Ventures LLC)
• Original Assignee: Silverbrook Research Pty Limited
• Inventors: Silverbrook, Kia
• Primary Examiner(s): Blum, David
• Assistant Examiner(s): MITCHELL, JAMES M
• Application Number:
  US10/728,929
• Publication Number:
  US 20040101992A1
• Time in Patent Office: 778 Days
• Field of Search: 257/704, 257/710, 257/924, 438/106, 438/598
• US Class Current: 438/106
• CPC Class Codes: B29C 2035/0822 using IR radiation
• CPC Class Codes: B29C 2043/503 using ejector pins, rods
• CPC Class Codes: B29C 33/0022 Multi-cavity moulds B29C33/301 takes precedence
• CPC Class Codes: B29C 33/3842 Manufacturing moulds, e.g. shaping the mould surface by machining
• CPC Class Codes: B29C 43/36 Moulds for making articles of definite length, i.e. discrete articles
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 2203/0109 Bonding an individual cap on the substrate
• CPC Class Codes: B81C 2203/0127 Using a carrier for applying a plurality of packaging lids to the system wafer
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 2224/48463 the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/1461 MEMS
• CPC Class Codes: Y10S 257/924 with passive device, e.g. capacitor, or battery, as integral part of housing or housing element, e.g. cap

Abstract

A method is disclosed for applying a plurality of caps to a plurality of microfabricated devices at the wafer stage. A wafer is provided-having a plurality of microfabricated devices. The method requires forming a plurality of first hollow molded caps from a layer of thermoplastic material which is placed in a mold. The mold has first and second mold halves which are brought together to form the caps. Each cap has a central portion and a perimeter wall. The caps are formed first as an array of caps in the mold. Separated caps are applied simultaneously to one side of the wafer. The first caps are attached to the wafer, and then the wafer is then eventually separated into individual chips.

Claims

1. A method of applying a plurality of caps to a plurality of microfabricated devices at the wafer stage, the method including:

a) forming a plurality of hollow molded caps, as an array, from a layer of thermoplastic material which is placed in a mold, the mold having first and second mold halves which are brought together to form the caps, each cap having a central portion and a perimeter wall;

b) retaining the array in one of the mold halves;

c) applying the caps simultaneously to one side of a wafer with each cap overlying part or all of a device with a free edge of the perimeter wall contacting the wafer;

wherein

d) the coefficient of thermal expansion of the mold half retaining the array is compatible with the coefficient of thermal expansion of the wafer.

2. The method of claim 1 further comprising the step of:

applying a plurality of second caps to a second side of the wafer, before separating the wafer into individual packages.

3. The method of claim 1 wherein, the wafer is separated into individual packages by a deep plasma etch of the wafer.

4. The method of claim 1 wherein, caps are applied to the top and bottom of the wafer and material between caps is removed by a deep plasma etch from the bottom of the wafer using the caps that are applied to the bottom of the wafer as masks.

5. The method of claim 1 wherein, the mold is made from a semiconductor.

6. The method of claim 1 wherein, applying the separated caps further comprises using a release wafer having pins which pass through holes in a mold half.

7. The method of claim 6 wherein, the first mold half has openings for receiving the pins, the pins being longer than the openings.

8. The method of claim 6 wherein, there is a gap between the first mold half and the release wafer, and using the release wafer further comprises applying a vacuum to the gap.

9. The method of claim 1 wherein, the caps are formed from a layer of thermoplastic material, and further comprising the step of etching caps under an oxygen plasma etch process.

10. The method of claim 9 wherein, forming the caps comprises heating the layer with infrared radiation while it is in the mold.

11. The method of claim 1 wherein, the first and second mold halves each have eject holes for receiving eject pins which are formed on adjacent release wafers.

12. The method of claim 1 wherein, the thermoplastic material is 200-500 microns thick prior to being formed into caps.

13. The method of claim 1 wherein, a thin layer joining adjacent caps during molding is removed a squeezing action of the mold.

14. The method of claim 13 wherein, the thin layer is removed by a squeezing together of portions of the mold halves which have unetched top surfaces.

15. The method of claim 1 wherein, a thin layer joining the caps after molding is of the material from which the caps are formed, and the thin layer is removed by an oxygen plasma etch.

16. The method of claim 1 wherein, the wafer further comprises chips that are substantially completely packaged prior to being separated.

17. The method of claim 1 wherein the thermoplastic material absorbs infrared radiation within the wavelength range of about 1000 nm to about 5000 nm.

18. The method of claim 1, wherein, the first mold half has a lower surface into which is formed a series of recesses defined by lateral edges, the second mold half having an upper surface in which is formed a series of grooves, the grooves aligning with the edges to define mold cavities, the recesses and grooves having a repeat spacing that corresponds to a spacing on a wafer to which the caps will be applied.

19. The method of claim 18, wherein the grooves or the recesses are separated by a portion of the wafer which has not been etched.

20. The method of claim 1 wherein, the caps are formed of a material is substantially unaffected by an etch to remove wafer material.