Correlator

• US 6,990,141 B1
• Filed: 09/19/2000
• Issued: 01/24/2006
• Est. Priority Date: 09/20/1999
• Status: Expired due to Fees

• Current Assignee: NEC Corporation
• Original Assignee: NEC Corporation
• Inventors: Iwasaki, Motoya
• Primary Examiner(s): DEPPE, BETSY LEE
• Application Number:
  US10/088,553
• Time in Patent Office: 1,953 Days
• Field of Search: 375/142, 375/143, 375/145, 375/149, 375/150, 375/152, 375/343, 375/367, 375/365, 375/368, 708/422, 708/425, 370/335, 370/342, 370/441
• US Class Current: 375/150
• CPC Class Codes: G06F 17/15 Correlation function computation including computation of convolution operations arithmetic circuits for sum of products per se, e.g. multiply-accumulators G06F7/5443; digital filters, e.g. FIR, IIR, adaptive filters H03H17/00
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 1/7077 Multi-step acquisition, e.g. multi-dwell, coarse-fine or validation
• CPC Class Codes: H04B 1/709 Correlator structure
• CPC Class Codes: H04B 1/7093 Matched filter type
• CPC Class Codes: H04B 2201/70707 Efficiency-related aspects

Abstract

A correlator which detects correlation for data having a certain length includes a plurality of sub-correlators, each of the sub-correlators having a length equal to a divisor of the certain length and each of the sub-correlators having such a length that a product of all lengths of the sub-correlators is equal to the certain length. A correlation value output from one of the sub-correlators is input into a sub-correlator located immediately downstream of one of the sub-correlators.

Claims

1. A correlator that receives an input signal including a fixed pattern formed by spreading a predetermined number of symbols with pseudorandom noise code wherein the predetermined number of symbols comprises a fixed word, comprising:

a first sub-correlator; and

a second sub-correlator,

wherein said first sub-correlator detects correlation between said input signal and said pseudorandom noise code for one symbol length,

wherein said second sub-correlator detects correlation between a correlation value output from said first sub-correlator and said fixed word for said predetermined number of symbols,

wherein said second sub-correlator comprises a number of second sub-correlators, and

wherein said number is determined in accordance with a number of different fixed words.

2. The correlator as set forth in claim 1, further comprising:

maximum detecting means for receiving an output transmitted from said plurality of second sub-correlators, and outputting a maximum signal for informing synchronous detection when a correlation value transmitted from each of said second sub-correlators comprises a maximum.

3. A correlator comprising:

a first sub-correlator that receives a fixed pattern including a code length N (N=M×

K), as an input signal comprised of signals obtained by spreading a fixed word having a length of K, at a rate of M chips/symbol, and detects a correlation value between a k-th (0<

k<

K) symbol including an M chip length, among said fixed pattern, and pseudorandom noise code Sm, wherein m comprises an integer defined as k×

M<

m<

((k+1)×

M) and M and K comprise predetermined positive integers; and

a second sub-correlator that receives data corresponding to K symbols, including a correlation value output from said first sub-correlator, and outputs a correlation value between said data and said fixed word,

wherein said second sub-correlator comprises a number of second sub-correlators, and

wherein said number is determined in accordance with a number of different fixed words.

4. A correlator comprising:

a first sub-correlator that receives a fixed pattern having a code length N (N=M×

K), as an input signal comprised of signals obtained by spreading a fixed word having a length of K symbols, at a rate of M chips/symbol, and detects a correlation value between a k-th (0<

k<

K) symbol having a M chip length, among said fixed pattern, and pseudorandom noise code Sm, wherein m comprises an integer defined as k×

M<

m<

((k+1)×

M) and M and K comprise predetermined positive integers;

a memory that stores a predetermined number of correlation values per symbol, said correlation values being transmitted from said first sub-correlator and different in a phase from one another with respect to said input signal, and that stores correlation values substantially corresponding to K symbols; and

a second sub-correlator that receives a data corresponding to K symbols, which is read from said memory for each of said predetermined number, and outputs a correlation value between said data and said fixed word.

5. The correlator as set forth in claim 4, wherein said second sub-correlator comprises a number of second sub-correlators, and

wherein said number is determined in accordance with a number of different fixed words.

6. The correlator as set forth in claim 5, further comprising:

maximum detecting means for receiving an output transmitted from at least one of said plurality of second sub-correlators, and outputting a maximum signal for informing synchronous detection when a correlation value transmitted from one of said at least one of said plurality of said second sub-correlators comprises a maximum.

7. The correlator as set forth in claim 4, further comprising:

a code switch that switches said pseudorandom noise code for detecting correlation with said input signal.

8. The correlator as set forth in claim 4, wherein said correlation values being different in a phase from one another, comprise correlation values including phases different from one another by one or ½

chip.

9. The correlator as set forth in claim 4, wherein said memory comprises a dual port type random access memory.

10. A correlator which receives a fixed pattern having a code length N (N=M×

K) which fixed pattern is obtained by spreading a fixed word having a length of K symbols, at a rate of M chips/symbol, comprising;

a first sub-correlator which receives said fixed pattern as an input signal, and detects a correlation value between a k-th (0<

k<

K) symbol including an M chip length, among said fixed pattern, and pseudorandom noise code Sm, wherein m comprises an integer defined as k×

M<

m<

((k+1)×

M) and M and K comprise predetermined positive integers;

a memory that stores a predetermined number (L) of correlation values per symbol, said correlation values being transmitted from said first sub-correlator and different in a phase from one another with respect to said input signal, and that stores L×

K correlation values substantially corresponding to K symbols;

a reading-address controller that outputs a reading-address for reading data corresponding to K symbols from said memory for each of said L correlation values; and

a second sub-correlator that receives said data corresponding to K symbols, which is read from said memory for each of said L correlation values, and outputs a correlation value between said data and said fixed word.

11. The correlator as set forth in claim 10, further comprising:

a writing-address controller that outputs a writing-address,

wherein a correlation value output from said first sub-correlator is written into an address in said memory, said address being designated by said writing-address controller.

12. The correlator as set forth in claim 10, wherein said second sub-correlator comprises a number of second sub-correlators, and

wherein said number is determined in accordance with a number of different fixed words.

13. The correlator as set forth in claim 12, further comprising:

maximum detecting means for receiving an output transmitted from at least one of said plurality of second sub-correlators, and outputting a maximum signal for informing synchronous detection when a correlation value transmitted from one of said at least one of said plurality of said second sub-correlators comprises a maximum.

14. The correlator as set forth in claim 10, further comprising:

a code switch that switches said pseudorandom noise code for detecting correlation with said input signal.

15. The correlator as set forth in claim 10, wherein said correlation values being different in a phase from one another, comprise correlation values including phases different from one another by one or ½

chip.

16. The correlator as set forth in claim 10, wherein said memory comprises a dual port type random access memory.

17. A correlator comprising:

a first sub-correlator that receives a fixed pattern having a code length N (N=M×

K), as an input signal comprised of signals obtained by spreading a fixed word having a length of K symbols, at a rate of M chips/symbol, and detects a correlation value between a k-th (0<

k<

K) symbol including an M chip length, among said fixed pattern, and pseudorandom noise code Sm, wherein m comprises an integer defined as k×

M<

m<

((k+1)×

M) and M and K comprise predetermined positive integers;

a memory that stores a predetermined number of correlation values per symbol, said stored correlation values being transmitted from said first sub-correlator and different in a phase from one another with respect to said input signal, and that stores correlation values substantially corresponding to K symbols; and

a comparator that compares K stored correlation values transmitted from said first sub-correlator to said fixed word to check whether they are coincident with each other.

18. A correlator which receives a fixed pattern having a code length N (N=M×

K), wherein the fixed pattern is obtained by spreading a fixed word having a length of K symbols at a rate of M chips/symbol, comprising;

a first sub-correlator which receives said fixed pattern as an input signal, and detects a correlation value between a k-th (0<

k<

K) symbol including an M chip length, among said fixed pattern, and pseudorandom noise code Sm, wherein m comprises an integer defined as k×

M<

m<

((k+1)×

M) and M and K comprise predetermined positive integers;

a memory that stores a predetermined number (L) of correlation values per symbol, said stored correlation values being transmitted from said first sub-correlator and different in a phase from one another with respect to said input signal, and that stores L×

K correlation values substantially corresponding to K symbols;

a reading-address controller that outputs a reading-address for reading data corresponding to K symbols from said memory for each of said L correlation values; and

a comparator that compares K stored correlation values transmitted from said first sub-correlator to said fixed word to check whether they are coincident with each other.

19. A CDMA (Code Division Multiple Access) communication device including a correlator which receives an input signal including a fixed pattern formed by spreading a predetermined number of symbols comprising a fixed word, with pseudorandom noise code, comprising:

a first sub-correlator of said correlator; and

a second sub-correlator of said correlator,

wherein said first sub-correlator detects correlation between said input signal and said pseudorandom noise code for one symbol length, and

wherein said second sub-correlator detects correlation between a correlation value output from said first sub-correlator and said fixed word for said predetermined number of symbols,

wherein said second sub-correlator comprises a number of second sub-correlators, and

wherein said number is determined in accordance with a number of different fixed words.

20. A CDMA (Code Division Multiple Access) communication device including a correlator comprising:

a first sub-correlator that receives a fixed pattern including a code length N (N=M×

K), as an input signal comprised of signals obtained by spreading a fixed word having a length of K symbols, at a rate of M chips/symbol, and detects a correlation value between a k-th (0<

k×

<

K) symbol including an M chip length, among said fixed pattern, and pseudorandom noise code Sm, wherein m comprises an integer defined as k×

M<

m<

((k+1)×

M) and M and K comprise positive integers; and

a second sub-correlator that receives data corresponding to K symbols, including a correlation value output from said first sub-correlator, and outputs a correlation value between said data and said fixed word,

wherein said second sub-correlator comprises a number of second sub-correlators, and wherein said number is determined in accordance with a number of different fixed words.

21. A CDMA (Code Division Multiple Access) communication device including a correlator comprising:

a first sub-correlator that receives a fixed pattern having a code length N (N=M×

K), as an input signal comprised of signals obtained by spreading a fixed word having a length of K symbols, at a rate of M chips/symbol, at a rate of M chips/symbol, and detects a correlation value between a k-th (0<

k<

K) symbol including an M chip length, among said fixed patterns, and pseudorandom noise code Sm, wherein m comprises an integer defined as k×

M<

m<

((k+1)×

M) and M and K comprise predetermined positive integers;

a memory that stores a predetermined number of correlation values per symbol, said correlation values being transmitted from said first sub-correlator and different in a phase from one another with respect to said input signal, and that stores correlation values substantially corresponding to K symbols; and

a second sub-correlator that receives data corresponding to K symbols, which is read from said memory for each said predetermined number, and outputs a correlation value between said data and said fixed word.

22. A CDMA (Code Division Multiple Access) communication device including a correlator that receives a fixed pattern having a code length N (N=M×

×

K), said fixed pattern being obtained by spreading a fixed word having a length of K symbols at a rate of M chips/symbol,

said correlator comprising;

a first sub-correlator having a correlation value between a k-th (0<

k<

K) symbol having a M chip length, among said fixed pattern, and pseudorandom noise code Sm, wherein m comprises an integer defined as k×

M<

m<

((k+1)×

M) and M and K comprise predetermined positive integers;

a memory that stores a predetermined number (L) of correlation values per symbol, said correlation values being transmitted from said first sub-correlator and different in a phase from one another with respect to said input signal, and that stores L×

K correlation values substantially corresponding to K symbols;

a reading-address controller that outputs a reading-address for reading data corresponding to K symbols from said memory for each of said L correlation values; and

a second sub-correlator that receives said data corresponding to K symbols, which is read from said memory for each of said L correlation values, and outputs a correlation value between said data and said fixed word.

23. A spread spectrum type communication device comprising a correlator that performs synchronization capture,

said correlator comprising:

a first sub-correlator that detects correlation between an input signal and pseudorandom noise code for inverse-spreading said input signal having been spectrum-spread; and

a second sub-correlator that detects correlation between a predetermined number of correlation outputs transmitted from said first sub-correlator and a synchronization pattern,

wherein said second sub-correlator comprises a number of second sub-correlators, and

wherein said number is determined in accordance with a number of different fixed words.

24. A spread spectrum communication device comprising a correlator that performs synchronization capture,

said correlator comprising:

a first sub-correlator that detects correlation between an input signal and pseudorandom noise code for inverse-spreading said input signal having been spectrum-spread; and

a second sub-correlator comprising a number of second sub-correlators,

wherein said number is determined in accordance with a number of different fixed words, and

wherein said second sub-correlator includes a comparator that compares a predetermined number of correlation outputs transmitted from said first sub-correlator to a synchronization pattern for checking whether they are coincident with each other.

25. A correlator comprising:

a first sub-correlator; and

a second sub-correlator,

wherein said first sub-correlator receives an input signal including a fixed pattern formed by spreading a predetermined number of symbols with pseudorandom noise code, said symbols including a fixed word,

wherein said first sub-correlator detects correlation between said input signal and said pseudorandom noise code for one symbol length and outputs a first correlation value, and

wherein said second sub-correlator detects correlation between said first correlation value and said fixed word for said predetermined number of symbols and outputs a second correlation value,

wherein said second sub-correlator comprises a number of second sub-correlators, and

wherein said number is determined in accordance with a number of different fixed words.

26. A correlator comprising:

a first sub-correlator; and

a second sub-correlator,

wherein said first sub-correlator receives a fixed pattern including a code length N, as an input signal comprised of signals obtained by spreading a fixed word including a length of K symbols, at a rate of M chips/symbol,

wherein said first sub-correlator detects a correlation value between a k-th symbol including an M chip length, among said fixed pattern, and pseudorandom noise code Sm,

wherein said second sub-correlator receives data corresponding to K symbols, including a correlation value output from said first sub-correlator, and outputs a correlation value between said data and said fixed word,

wherein N=M×

K, M and K comprise predetermined positive integers, 0<

k<

K, and m comprises an integer defined as k×

M<

m<

((k+1)×

M),

wherein said second sub-correlator comprises a number of second sub-correlators, and

wherein said number is determined in accordance with a number of different fixed words.

27. The correlator as set forth in claim 26, further comprising:

a memory,

wherein said memory stores a predetermined number of correlation values per a symbol, said correlation values being transmitted from said first sub-correlator and different in a phase from one another with respect to said input signal, and

wherein said memory stores correlation values substantially corresponding to K symbols.

28. The correlator as set forth in claim 27, wherein said second sub-correlator reads from said memory for each of said predetermined number.

29. The correlator as set forth in claim 27, further comprising:

a writing-address controller that outputs a writing-address,

wherein a correlation value output from said first sub-correlator is written into an address in said memory, said address being designated by said writing-address controller.

30. The correlator as set forth in claim 26, further comprising:

means for receiving an output transmitted from at least one of said plurality of second sub-correlators and outputting a maximum signal for informing synchronous detection when a correlation value transmitted from one of said at least one of said plurality of said second sub-correlators comprises a maximum.

31. A correlator comprising:

means for receiving an input signal including a fixed pattern formed by spreading a predetermined number of symbols with pseudorandom noise code, said symbols including a fixed word, detecting correlation between said input signal and said pseudorandom noise code for one symbol length, and outputting a first correlation value;

means for detecting correlation between said first correlation value and said fixed word for said predetermined number of symbols and outputting a second correlation value, and

means for receiving said second correlation value, said means comprising a number of second sub-correlators,

wherein said number is determined in accordance with a number of different fixed words.

32. A correlator comprising:

means for receiving an input signal including a fixed pattern including a code length N, said input signal comprising signals obtained by spreading a fixed word including a length of K symbols, at a rate of M chips/symbol, and detecting a correlation value between a k-th symbol including an M chip length, among said fixed pattern, and pseudorandom noise code Sm, and

means for receiving data corresponding to K symbols, including a correlation value output from a first sub-correlator, and outputting a correlation value between said data and said fixed word,

wherein N=M×

K, M and K comprise predetermined positive integers, 0<

k<

K, and m comprises an integer defined as k×

M<

m<

((k+1)×

M),

wherein said means for receiving data comprises a number of second sub-correlators, and

wherein said number is determined in accordance with a number of different fixed words.

33. A correlator that detects correlation for data including a predetermined length, comprising:

a plurality of sub-correlators,

wherein each of the sub-correlators comprises a length equal to a divisor of the predetermined length, and

wherein a correlation value output from one of the plurality of sub-correlators is received by another of the plurality of sub-correlators disposed downstream of the one of the plurality of sub-correlators, and

wherein a number of said plurality of sub-correlators is determined in accordance with said divisor of said predetermined length.