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Defect detection using multiple sensors and parallel processing

  • US 6,990,385 B1
  • Filed: 01/26/2004
  • Issued: 01/24/2006
  • Est. Priority Date: 02/03/2003
  • Status: Active Grant
First Claim
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1. A computer-implemented method of detecting features on a semiconductor wafer comprising:

  • collecting data with a plurality of detectors that are positioned about the semiconductor wafer, wherein at least one of the detectors is configured to collect data in a different manner from other detectors of the plurality of detectors and wherein each detector collects one data frame for each of a plurality of device areas;

    transmitting the data frames from each detector to a data distribution node, which is part of a set of data distribution nodes that are interconnected with crossbar connections that enable data collected by any of the plurality of detectors to be transferred to any of the data distribution nodes;

    transferring a first data frame along a first data transfer path that connects a first and a second data distribution node of the set of data distribution nodes;

    transferring a second data frame along a second data transfer path that connects the first and second data distribution nodes of the set of data distribution nodes;

    routing the data frames from the data distribution nodes to processing nodes, wherein the transferring of data frames between data distribution nodes allows data from any one of the detectors to be routed to any one of the processing nodes;

    aligning the data frames to facilitate pixel matching between the frames so that they correspond to the same regions of the wafer; and

    processing the aligned data frames using at least one of;

    row based analysis, composite-row based analysis, column based analysis, and composite column based analysis.

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