Defect detection using multiple sensors and parallel processing
First Claim
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1. A computer-implemented method of detecting features on a semiconductor wafer comprising:
- collecting data with a plurality of detectors that are positioned about the semiconductor wafer, wherein at least one of the detectors is configured to collect data in a different manner from other detectors of the plurality of detectors and wherein each detector collects one data frame for each of a plurality of device areas;
transmitting the data frames from each detector to a data distribution node, which is part of a set of data distribution nodes that are interconnected with crossbar connections that enable data collected by any of the plurality of detectors to be transferred to any of the data distribution nodes;
transferring a first data frame along a first data transfer path that connects a first and a second data distribution node of the set of data distribution nodes;
transferring a second data frame along a second data transfer path that connects the first and second data distribution nodes of the set of data distribution nodes;
routing the data frames from the data distribution nodes to processing nodes, wherein the transferring of data frames between data distribution nodes allows data from any one of the detectors to be routed to any one of the processing nodes;
aligning the data frames to facilitate pixel matching between the frames so that they correspond to the same regions of the wafer; and
processing the aligned data frames using at least one of;
row based analysis, composite-row based analysis, column based analysis, and composite column based analysis.
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Abstract
Techniques for detecting defects on semiconductor wafers are described. The techniques involve a parallel processing system wherein a data distribution system contains data distribution nodes that are interconnected by multiple data transfer paths. This configuration allows data collected by any of the detectors to be routed to any one of a plurality of processing nodes. This in turn allows a variety of defect analysis algorithms to be implemented.
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Citations
20 Claims
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1. A computer-implemented method of detecting features on a semiconductor wafer comprising:
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collecting data with a plurality of detectors that are positioned about the semiconductor wafer, wherein at least one of the detectors is configured to collect data in a different manner from other detectors of the plurality of detectors and wherein each detector collects one data frame for each of a plurality of device areas; transmitting the data frames from each detector to a data distribution node, which is part of a set of data distribution nodes that are interconnected with crossbar connections that enable data collected by any of the plurality of detectors to be transferred to any of the data distribution nodes; transferring a first data frame along a first data transfer path that connects a first and a second data distribution node of the set of data distribution nodes; transferring a second data frame along a second data transfer path that connects the first and second data distribution nodes of the set of data distribution nodes; routing the data frames from the data distribution nodes to processing nodes, wherein the transferring of data frames between data distribution nodes allows data from any one of the detectors to be routed to any one of the processing nodes; aligning the data frames to facilitate pixel matching between the frames so that they correspond to the same regions of the wafer; and processing the aligned data frames using at least one of;
row based analysis, composite-row based analysis, column based analysis, and composite column based analysis. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
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17. A semiconductor wafer inspection system comprising:
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a semiconductor wafer having a plurality of device areas; a plurality of detectors each configured to obtain data using more than one manner of data collection and wherein the detectors are positioned about a semiconductor wafer wherein each detector is configured to collect a data frame for each of the plurality of device areas; a data distribution system that includes a plurality of data distribution nodes, at least one of the data distribution nodes configured to receive data frames from the detectors; a plurality of data transfer paths connecting each of the data distribution nodes wherein at least some of the data transfer paths include crossbar connections between the data distribution nodes that enable data collected by any of the plurality of detectors to be transferred to any of the data distribution nodes and wherein each data transfer path transfers data frames collected by a respective detector; a plurality of processing nodes configured to receive data frames from the data distribution system, the processing nodes configured to analyze the data frames, wherein the data transfer paths allow data frames collected by any one of the detectors to be routed to any one of the processing nodes; and wherein each of the processing nodes are configured to align the data frames and conduct parallel processing of the data frames using at least one of;
row based analysis, composite-row based analysis, column based analysis and composite column based analysis to identify defects. - View Dependent Claims (18, 19, 20)
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Specification