Task synchronization mechanism and method

• US 6,990,560 B2
• Filed: 01/16/2003
• Issued: 01/24/2006
• Est. Priority Date: 01/16/2003
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Corrigan, Michael Joseph, Armstrong, William Joseph, Torzewski, Timothy Joseph, Ricard, Gary Ross
• Primary Examiner(s): Nguyen, Hiep T.
• Application Number:
  US10/346,010
• Publication Number:
  US 20040143712A1
• Time in Patent Office: 1,104 Days
• Field of Search: 711/152, 711/150, 711/151, 711/163, 710/200
• US Class Current: 711/152
• CPC Class Codes: G06F 9/526 Mutual exclusion algorithms
• CPC Class Codes: G06F 9/544 Buffers; Shared memory; Pipes

Abstract

A task synchronization mechanism operates on a global lock that is shared between processors an on local locks that are not shared between processors. The local locks are processor-specific locks. Each processor-specific lock is dedicated to a particular processor in the system. When shared access to a resource is required, a processor updates its processor-specific lock to indicate the processor is sharing the resource. Because each processor-specific lock is dedicated to a particular processor, this eliminates a significant portion of the memory bus traffic associated with all processors reading and updating the same lock. When exclusive access to a resource is required, the requesting processor waits until the count of all processor-specific locks indicate that none of these processors have a lock on the resource. Once no processor has a lock on the resource, exclusive access to the resource may be granted.

Claims

1. An apparatus comprising:

a plurality of processors;

a memory coupled to the plurality of processors;

a global lock residing in the memory;

a plurality of processor-specific locks residing in the memory, each processor-specific lock corresponding to one of the plurality of processors; and

a task synchronization mechanism residing in the memory and executed by at least one of the plurality of processors, the task synchronization mechanism controlling access by the plurality of processors to a shared resource, the task synchronization mechanism updating one of the plurality of processor-specific locks when the requested access is a request for shared access to the shared resource, the task synchronization mechanism updating the global lock when the requested access is for exclusive access to the shared resource.

2. The apparatus of claim 1 wherein each processor-specific lock comprises a count of shared locks.

3. The apparatus of claim 2 wherein each processor-specific lock further comprises a mode setting that may be set to fast or slow.

4. The apparatus of claim 3 wherein the task synchronization mechanism reads the mode setting of a processor-specific lock, and determines whether to update the processor-specific lock and whether to update the global lock based on the mode setting of the processor-specific lock.

5. The apparatus of claim 1 wherein the task synchronization mechanism updates the global lock only when the plurality of processor-specific locks indicate the shared resource is not being shared.

6. The apparatus of claim 1 wherein the global lock comprises:

a count of shared locks; and

an exclusive lock.

7. The apparatus of claim 6 wherein the global lock further comprises a mode setting that may be set to fast or slow.

8. The apparatus of claim 7 wherein the task synchronization mechanism reads the mode setting of the global lock, and determines whether to update a processor-specific lock and whether to update the global lock based on the mode setting of the global lock.

9. An apparatus comprising:

a plurality of processors;

a memory coupled to the plurality of processors;

a global lock residing in the memory, the global lock including an exclusive lock;

a plurality of processor-specific locks residing in the memory, each processor-specific lock corresponding to one of the plurality of processors, each processor-specific lock including a count of shared locks; and

a task synchronization mechanism residing in the memory and executed by at least one of the plurality of processors, the task synchronization mechanism controlling access by the plurality of processors to at least one shared resource, the task synchronization mechanism updating one of the plurality of processor-specific locks when the requested access is a request for shared access to a first shared resource, the task synchronization mechanism updating the global lock when the requested access is for exclusive access to the first shared resource and when the count of shared locks for the plurality of processor-specific locks indicate that none of the plurality of processor-specific locks are sharing the first shared resource.

10. The apparatus of claim 9 wherein each processor-specific lock further comprises a mode setting that may be set to fast or slow, wherein the task synchronization mechanism determines whether to update a processor-specific lock and whether to update the global lock based on the mode setting of a processor-specific lock.

11. The apparatus of claim 9 wherein the global lock further comprises a mode setting that may be set to fast or slow, wherein the task synchronization mechanism determines whether to update a processor-specific lock and whether to update the global lock based on the mode setting of the global lock.

12. A method for controlling access to a shared resource in a multiprocessor computer system, the method comprising the steps of:

defining a global lock;

defining a processor-specific lock for each processor in the multiprocessor computer system;

updating one of the plurality of processor-specific locks when a requested access is a request for shared access to the shared resource; and

updating the global lock when the requested access is for exclusive access to the shared resource.

13. The method of claim 12 wherein each processor-specific lock comprises a count of shared locks, and the step of updating one of the plurality of processor-specific locks comprises the step of changing the count of shared locks.

14. The method of claim 12 wherein the step of updating the global lock is performed only when the plurality of processor-specific locks indicate that none of the plurality of processor-specific locks are sharing the shared resource.

15. A method for controlling access to a shared resource in a multiprocessor computer system, the method comprising the steps of:

(A) defining a global lock comprising;

(A1) a shared lock that includes a count of shared locks;

(A2) an exclusive lock; and

(A3) a mode setting that may be set to fast or slow;

(B) defining a processor-specific lock for each processor in the multiprocessor computer system, each processor-specific lock comprising;

(B1) a count of shared locks; and

(B2) a mode setting that may be set to fast or slow;

(C) receiving a request for access to the shared resource;

(D) reading the mode setting of a processor-specific lock that corresponds to the request;

(E) if the mode setting of the processor-specific lock is fast, and if the request for access is a request for shared access, updating one of the plurality of processor-specific locks;

(F) if the mode setting of the processor-specific lock is slow, performing the steps of;

(F1) reading the mode setting of the global lock;

(F2) if the mode setting of the global lock is fast, updating one of the plurality of processor-specific locks; and

(F3) if the mode setting of the global lock is slow and if the shared count of each processor-specific lock is zero, updating the exclusive lock.

16. A computer-readable program product comprising:

(A) a task synchronization mechanism that controls access to a shared resource using a global lock and a plurality of processor-specific locks, the task synchronization mechanism updating one of the plurality of processor-specific locks when a requested access is a request for shared access to the shared resource, the task synchronization mechanism updating the global lock when the requested access is for exclusive access to the shared resource; and

(B) recordable signal bearing media bearing the task synchronization mechanism.

17. The program product of claim 16 wherein each processor-specific lock comprises a count of shared locks.

18. The program product of claim 17 wherein each processor-specific lock further comprises a mode setting that may be set to fast or slow.

19. The program product of claim 18 wherein the task synchronization mechanism reads the mode setting of a processor-specific lock, and determines whether to update a processor-specific lock and whether to update the global lock based on the mode setting of a processor-specific lock.

20. The program product of claim 16 wherein the task synchronization mechanism updates the global lock only when the plurality of processor-specific locks indicate the shared resource is not being shared.

21. The program product of claim 16 wherein the global lock comprises:

a count of shared locks; and

an exclusive lock.

22. The program product of claim 21 wherein the global lock further comprises a mode setting that may be set to fast or slow.

23. The program product of claim 22 wherein the task synchronization mechanism reads the mode setting of the global lock, and determines whether to update a processor-specific lock and whether to update the global lock based on the mode setting of the global lock.

24. A computer-readable program product comprising:

(A) a task synchronization mechanism that controls access by a plurality of processors to a shared resource using a global lock that includes an exclusive lock and a plurality of processor-specific locks that each include a count of shared locks, the task synchronization mechanism updating one of the plurality of processor-specific locks when a requested access is a request for shared access to a first shared resource, the task synchronization mechanism updating the global lock when the requested access is for exclusive access to the first shared resource and when the count of shared locks for the plurality of processor-specific locks indicate the shared resource is not being shared; and

(B) recordable signal bearing media bearing the task synchronization mechanism.