Ultra-linear multi-channel field effect transistor

• US 6,992,319 B2
• Filed: 06/24/2002
• Issued: 01/31/2006
• Est. Priority Date: 07/18/2000
• Status: Expired due to Fees

• Current Assignee: Epitaxial Technologies, LLC
• Original Assignee: E.T.C. Epitaxial Technology Center S.r.l.
• Inventors: Aina, Olaleye A., Hier, Harry Stephen, Fahimulla, Ayub M
• Primary Examiner(s): Kielin, Erik
• Assistant Examiner(s): Dolan, Jennifer M
• Application Number:
  US10/176,787
• Publication Number:
  US 20020185655A1
• Time in Patent Office: 1,317 Days
• Field of Search: 257/12, 257/14, 257/15, 257/20, 257/27, 257/183, 257/192, 257/194, 257/220, 257/241, 257/287
• US Class Current: 257/20
• CPC Class Codes: B82Y 10/00 Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
• CPC Class Codes: H01L 29/1029 of field-effect transistors
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/7785 with more than one donor layer
• CPC Class Codes: H01L 29/802 with heterojunction gate, e.g. transistors with semiconductor layer acting as gate insulating layer, MIS-like transistors H01L29/806 takes precedence; with one dimensional electron gas H01L29/775; with dimensional electron gas H01L29/778

Abstract

Alternate layers of wide band gap and narrow band gaps of different kinds of semiconductors are used to form multiple channels of a FET. The channels are doped or formed as 2-DEG/2-DHG in narrow band semiconductor by charge supply layer in the wide band gap semiconductor. The different kinds of semiconductors form heterojunctions to confine the electrons/holes in separate thin spikes layers. A number of spikes (3–10 nm thick) of different doped or 2-DEG/2-DHG concentrations in various channels can result in overall electron concentration gradient such as a 1/x³ electron/hole concentrations profile. Such an electron/hole concentration gradient can result in a linear variation of drain current with voltage to obtain a wide dynamic range.

Claims

1. A field effect transistor (FET) comprising:

a substrate, a source, a gate and a drain;

multiple channels in said substrate between said drain and said source to improve the linearity of drain current vs drain voltage characteristics when a gate voltage exceeding the threshold voltage is applied at the gate,

said multiple channels alternaing layers of undoped layers of first kind of semiconductor and doped layers of second kind of semiconductor, and

said doped layers having doping concentrations which decrease with depth from said gate,

wherein the channels are selected from the group consisting of uniformly doped, delta coped, spiked, InAs sub-well, TIP (TIAs) sub-well, InN sub-well and InAs, TIP, TIAs, InN self assembled quantum dots for III-V compound semiconductors,

wherein the channels are selected from the group consisting from the group consisting of uniformly doped delta doped, spiked doped, Ge sub-well, Sn sub-well, Sn sub-well and self assembled ciuantum dots selected from the group consisting of Ge and Sn for IV—

IV compound semiconductor; and

wherein said FET is an Insulated Gate Field Effect Transistor (IGFET).

2. The IGFET as described in claim 1, wherein alternate layers of first kind of semiconductor and a second kind of semiconductor forming heterojunction are selected from the group of semiconductors including,

multiple channels of 2-dimension gas created in second kind semiconductor by doping the first kind semiconductor,

said multiple channels of 2-DEG or 2-DHG created in second kind semiconductor by selective implantation into both first kind and second semiconductor, and

multiple channels created in second semiconductor by doping with N- or P-type conductivity and using undoped second kind semiconductor.

3. The IGFET as described in claim 1, wherein said any combination of first/second kind pairs are selected from the family of III, IV—

IV, II-VI, III-V/II-VI, and iii-V-IV semiconductor.

4. The IGFET as described in claim 1, further comprising a cap over said multiple channels and support said source, said drain, and said gate.

5. The IGFET as described in claim 4, wherein the cap is the insulator, in which the insulator is processed by means selected from the group consisting of thermal growth and deposition.

6. The IGFET as described in claim 1, wherein the insulator or said FET is thermally grown to form oxides/nitrides selected from the group consisting of Si, InP, GaAs, AlAs, AlGaAs, AlAsSb.

7. The IGFET as described in claim 1, wherein the insulator is deposited and said insulator is selected from the group consisting of SiO₂, Si₃N₄, Al₂O₃, and AIN.

8. The IGFET as described in claim 1, wherein a complementary FET is be formed by selective implantation using any combination of first/second kind undoped pairs, selected from the family of group consisting of III-V, IV—

IV, II-VI, III-V/II-VI, and III-V/IV-IV semiconductor.

9. A field effect transistor (FET) comprising:

a substrate, a source, a gate and a drain;

multiple channels in said substrate between said drain and said source to improve the linearity of drain current vs drain voltage characteristics when a gate voltage exceeding the threshold voltage is avplied at the gate,

said multiple channels having alternating layers of undoned layers of first kind of semiconductor and doped layers of second kind of semiconductor, and

said doped layers having doping concentrations which decrease with depth from said gate,

wherein the channels are selected from the group consisting of uniformly doped, delta doped, spiked doped, InAs sub-well, TIP (TIAs) sub-well, InN sub-well and InAs, TIP, TIAs, InN self-assembled quantum dots for III-V compound semiconductors, and

wherein the channels are selected from the group consisting of uniformly doped, delta coped, spiked doped, Ge sub-well, Sn sub-well and self assembled quantum dots selected from the group consisting of Ge and Sn for IV—

IV compound semiconductors;

a Schottky layer and a cap over said multiple channels and support said source, said drain and said gate; and

layers of oxidation banier between the Schottky barrier and the cap layer, selected from the group consisting of;

undoped AlGaAs layer, undoped GaAs layer, undoped AlGaSb layer, undoped AlInAs layer, undoped layers of AlInAs and GaAs.