Electroless nickel immersion gold semiconductor flip chip package

• US 6,992,397 B1
• Filed: 02/09/2004
• Issued: 01/31/2006
• Est. Priority Date: 03/05/2003
• Status: Expired due to Fees

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Altera Corporation (Intel Corporation)
• Inventors: Nguyen, My
• Primary Examiner(s): WILLIAMS, ALEXANDER O
• Application Number:
  US10/775,370
• Time in Patent Office: 722 Days
• Field of Search: 257/737, 257/738, 257/734, 257/778, 257/780, 257/772, 257/668, 257/692, 257/693, 257/762, 257/766, 257/765, 174259-261, 174/256, 228/262.6, 361/767, 361/768, 361/771, 361/783, 298/30
• US Class Current: 257/778
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01322 Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H05K 2201/10734 Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 3/244 Finish plating of conductors, especially of copper conductors, e.g. for pads or lands selective plating methods H05K3/243; finish plating of conductors made by printing techniques H05K3/246; solder as finish H05K3/3457, e.g. by plating H05K3/3473
• CPC Class Codes: H05K 3/3463 Solder compositions in relation to features of the printed circuit board or the mounting process
• CPC Class Codes: Y10T 29/49126 Assembling bases

Abstract

A flip chip package, apparatus and technique in which a ball grid array composed of a doped eutectic Pb/Sn solder composition is used. The dopant in the Pb/Sn solder forms a compound or complex with the phosphorous residue from the electroless nickel plating process that is mixable with the Pb/Sn solder. The phosphorous containing compound or complex prevents degradation of the solder/under bump metallization bond associated with phosphorus residue. The interfacial solder/under bump metallization bond is thereby strengthened. This results in fewer fractured solder bonds and greater package reliability.

Claims

1. A flip chip package, comprising:

a flip chip bound to an electroless nickel immersion gold packaging substrate; and

a doped solder ball array bonded to under bump metallization on the packaging substrate via an interface, the solder balls of the array comprising,

a Pb/sn bulk solder, and

a metal dopant selected from the group consisting of Cu, Al and Ni in an amount of at least 0.2% by weight.

2. The package of claim 1, wherein the metal dopant in the bulk solder bonds or complexes with phosphorus from the under bump metallization.

3. The package of claim 1, wherein the under bump metallization comprises vias filled with successive layers of copper, nickel and gold.

4. The package of claim 1, wherein the metal dopant is in an amount of about 0.2% to 2.5% by weight.

5. The package of claim 1, wherein the metal dopant is Cu.

6. The package of claim 1, wherein the metal dopant is Al.

7. The package of claim 1, wherein the metal dopant is Ni.

8. An electronic apparatus, comprising:

a flip chip bound to an electroless nickel immersion gold packaging substrate;

a printed circuit board; and

a doped solder ball array bonded to under bump metallization on the packaging substrate via an interface and electrically connecting the package to the printed circuit board, the solder balls of the array comprising,

a Pb/Sn bulk solder, and

a metal dopant selected from the group consisting of Cu, Al and Ni in an amount of at least 0.2% by weight.

9. The apparatus of claim 8, wherein the metal dopant is in an amount of about 0.2% to 2.5% by weight.

10. The apparatus of claim 8, wherein the metal dopant is Cu.

11. The apparatus of claim 8, wherein the metal dopant is Al.

12. The apparatus of claim 11, wherein the metal dopant is Ni.