Polysilicon and silicon dioxide light scatterers for silicon waveguides on five layer substrates

• US 6,993,236 B1
• Filed: 07/14/2005
• Issued: 01/31/2006
• Est. Priority Date: 06/24/2002
• Status: Active Grant

• Current Assignee: Cisco Technology, Inc. (Cisco Systems, Inc.)
• Original Assignee: Luxtera Incorporated (Cisco Systems, Inc.)
• Inventors: Gunn, Lawrence C. III, Pinguet, Thierry J., Rattier, Maxime Jean
• Primary Examiner(s): Font, Frank G.
• Assistant Examiner(s): Kalivoda, Christopher M.
• Application Number:
  US11/182,262
• Time in Patent Office: 201 Days
• Field of Search: None
• US Class Current: 385/131
• CPC Class Codes: G02B 2006/12097 Ridge, rib or the like
• CPC Class Codes: G02B 2006/12107 Grating
• CPC Class Codes: G02B 6/12004 Combinations of two or more optical elements
• CPC Class Codes: G02F 1/0151 modulating the refractive index
• CPC Class Codes: H01L 21/823807 with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
• CPC Class Codes: H01L 21/823864 with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
• CPC Class Codes: H01L 21/823878 isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/1203 the substrate comprising an insulating body on a semiconductor body, e.g. SOI three-dimensional layout H01L27/0688
• CPC Class Codes: H01L 29/7843 the means being an applied insulating layer
• CPC Class Codes: H01L 29/7846 the means being located in the lateral device isolation region, e.g. STI

Abstract

A standard CMOS process is used to fabricate optical, optoelectronic and electronic devices at the same time on a monolithic integrated circuit. FIG. 6 shows a polysilicon and silicon dioxide light scattering element formed on a silicon waveguide. The polysilicon light scatterer is formed on the core of the waveguide with a silicon dioxide layer between the polysilicon and the core. A standard CMOS process is used to form the waveguide and the light scattering element. FIG. 6A is a table summarizing the elements of the light scatterer and the waveguide of FIG. 6 and the CMOS transistors of FIGS. 1 and 2, which are formed from the same materials at the same time on the same substrate. Forming multiple light scatterers on the core of a waveguide can make a grating coupler.

Claims

1. A light scattering element for an optical waveguide with a core,

where the core of the optical waveguide is comprised of:

a slab of monocrystalline silicon,

a first layer of dielectric material disposed on the slab of monocrystalline silicon, and

a strip of monocrystalline silicon disposed on the first layer of dielectric material,

where the strip and a silicon body of a transistor are formed from the same monocrystalline silicon on the same substrate, and

the light scattering element is comprised of;

a second layer of dielectric material disposed on the strip of monocrystalline silicon,

where the second layer of dielectric material and a gate oxide for a transistor are formed at the same time of the same dielectric material,

a layer of polysilicon disposed on the second layer of dielectric material,

where the layer of polysilicon and a polysilicon gate for a transistor are formed at the same time from the same polysilicon, and

a cladding comprised of a plurality of dielectric materials,

where the cladding is disposed over;

the core of the waveguide,

the second layer of dielectric materials and

the layer of polysilicon, and

at least one of the plurality of dielectric materials is comprised of a layer of salicide block used during the fabrication of a transistor.

2. The optical waveguide of claim 1, wherein the substrate is comprised of a layer of silicon dioxide disposed on a layer of monocrystalline silicon.

3. The optical waveguide of claim 2, wherein

the substrate,

the slab of monocrystalline silicon disposed on the substrate,

the first layer of dielectric material disposed on the slab of monocrystalline silicon and

a layer of monocrystalline silicon disposed on the layer of dielectric material, where the strip of monocrystalline silicon is formed from the layer of monocrystalline silicon,

comprises a wafer.

4. The optical waveguide of claim 1, wherein the first layer of dielectric material is comprised of silicon dioxide and is used to electrically isolate the transistor from the slab of monocrystalline silicon.

5. The light scattering element of claim 1, wherein the cladding includes a bottom cladding comprised of the top layer of the substrate.

6. The light scattering element of claim 1, wherein the cladding includes a layer of dielectric material formed at the same time as the sidewall passivation for the silicon body of a transistor.

7. The light scattering element of claim 1, wherein the cladding includes a plurality of layers of dielectric material formed at the same time as a plurality of dielectric materials used as a gate spacer for a transistor.

8. The light scattering element of claim 1, wherein the cladding includes a layer of dielectric material formed at the same time as a contact punch-through layer for a transistor.

9. The light scattering element of claim 1, wherein the cladding includes a layer of dielectric material formed at the same time as an inter-level dielectric for a transistor.

10. The light scattering element of claims 6, 7, 8 or 9, wherein the layer of dielectric material included in the cladding is selected from the group comprising:

silicon dioxide, silicon oxynitride and silicon nitride.

11. The light scattering element of claim 1, wherein at least one of the plurality of dielectric materials is selected from a group of dielectrics used at the same time to form a dielectric element of a transistor, where the group of dielectrics comprises:

a contact punch-through layer, an inter-layer dielectric film, a gate spacer, a salicide block, a dielectric spacer, a sidewall passivation film, an isolation dielectric, an oxide spacer and a field oxide.

12. The optical waveguide of claim 11, wherein thermal oxidation is used to form a sidewall passivation film, where the sidewall passivation film is used as one of a plurality of dielectric materials for the optical waveguide and is formed at the same time as the sidewall passivation film for the body of a transistor.

13. The light scattering element of claim 1, wherein at least one of the plurality of dielectric materials is selected from the group comprising:

SiO₂, SiCOH, SiCOF, Si₃N₄, SiON, BPSG and silicon-based materials including one or more of the following elements;

oxygen, carbon, nitrogen, hydrogen, boron, phosphorus, fluorine and arsenic.

14. The light scattering element of claim 1, wherein the transistor is selected from the group comprising:

a CMOS transistor, a BiCMOS transistor, a bipolar junction transistor (BJT) and a junction FET (JFET) transistor.

15. The light scattering element of claim 1, wherein the salicide block layer is used as a gate spacer during the fabrication of a transistor on the same substrate.