Timing adjustment of clock signals in a digital circuit
First Claim
1. A digital system that performs a specified basic function by operating a plurality of mutually interdependent flip-flops to perform digital processing according to one or more clock signals, comprising:
- a plurality of delay elements which are inserted respectively in a plurality of clock circuits that supply said clock signals in said digital system and each of which is composed of a circuit element that changes a delay time according to a value indicated by a control signal, anda plurality of holding circuits that hold a plurality of control signals to be given to said plurality of delay elements, wherein;
said plurality of control signals having values that are changed by an external device, by (i) inputting a test signal to said digital system and observing a resultant output of the digital system and a resulting operational environment of the digital system, (ii) evaluating a fitness of the digital system from the observed output and operational environment of the digital system, and (iii) using a probabilistic search technique based on said evaluated fitness of the digital system, so that said basic function of the digital system satisfies a predetermined specification.
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Abstract
A digital system that performs a specified function by performing digital processing according to one or more clock signals is provided with a plurality of delay elements which are respectively inserted in a plurality of clock circuits that supply the clock signals in the digital system and each of which is composed of a circuit element that changes a delay time according to a value indicated by a control signal, and a plurality of holding circuits that hold a plurality of control signals to be given to the plurality of delay elements. In the plurality of holding circuits, a value of the control signals held by these holding circuits is changed by external devices according to a probabilistic search technique so that the digital system operates correctly in relation to operation timing.
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Citations
36 Claims
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1. A digital system that performs a specified basic function by operating a plurality of mutually interdependent flip-flops to perform digital processing according to one or more clock signals, comprising:
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a plurality of delay elements which are inserted respectively in a plurality of clock circuits that supply said clock signals in said digital system and each of which is composed of a circuit element that changes a delay time according to a value indicated by a control signal, and a plurality of holding circuits that hold a plurality of control signals to be given to said plurality of delay elements, wherein; said plurality of control signals having values that are changed by an external device, by (i) inputting a test signal to said digital system and observing a resultant output of the digital system and a resulting operational environment of the digital system, (ii) evaluating a fitness of the digital system from the observed output and operational environment of the digital system, and (iii) using a probabilistic search technique based on said evaluated fitness of the digital system, so that said basic function of the digital system satisfies a predetermined specification. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A digital system that performs a specified basic function by operating a plurality of mutually interdependent flip-flops to perform digital processing according to one or more clock signals, comprising:
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a plurality of delay elements which are inserted respectively in a plurality of clock circuits that supply said clock signals in said digital system and each of which is composed of a circuit element that changes a delay time according to a value indicated by a control signal, a plurality of holding circuits that hold a plurality of control signals to be given to said plurality of delay circuits, and a setting means that changes the values of said plurality of control signals by (i) inputting a test signal to said digital system and observing a resultant output of the digital system and a resulting operational environment of the digital system, (ii) evaluating a fitness of the digital system from the observed output and operational environment of the digital system, and (iii) using a probabilistic search technique based on said evaluated fitness of the digital system, so that said basic function of the digital system satisfies a predetermined specification. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A method for adjusting timing of one or more clock signals of a digital system that performs a specified basic function by operating a plurality of mutually interdependent flip-flops to perform digital processing according to said clock signals, said method comprising the steps of:
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inserting a plurality of delay elements respectively in a plurality of clock circuits that supply said clock signals in said digital system, forming said plurality of delay elements respectively out of circuit elements each changing a delay time according to a value indicated by a control signal, holding a plurality of control signals to be given to said plurality of delay elements in a plurality of holding circuits provided in said digital system, and changing the values of said plurality of control signals by an external device, by (i) inputting a test signal to said digital system and observing a resultant output of the digital system and a resulting operational environment of the digital system, (ii) evaluating a fitness of the digital system from the observed output and operational environment of the digital system, and (iii) using a probabilistic search technique based on said evaluated fitness of the digital system, so that said basic function of the digital system satisfies a predetermined specification. - View Dependent Claims (18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A method for adjusting timing of a one or more clock signals of a digital system that performs a specified basic function by operating a plurality of mutually interdependent flip-flops to perform digital processing according to said clock signals, said method comprising the steps of:
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inserting a plurality of delay elements respectively in a plurality of clock circuits that supply said clock signals in said digital system, forming said plurality of delay elements respectively out of circuit elements each changing a delay time according to a value indicated by a control signal, holding a plurality of control signals to be given to said plurality of delay elements in a plurality of holding circuits provided in said digital system, and changing the values of said plurality of control signals by a setting means provided in said digital system, by (i) inputting a test signal to said digital system and observing a resultant output of the digital system and a resulting operational environment of the digital system, (ii) evaluating a fitness of the digital system from the observed output and operational environment of the digital system, and (iii) using a probabilistic search technique based on said evaluated fitness of the digital system, so that said basic function of the digital system satisfies a predetermined specification. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34, 35, 36)
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Specification