Reception synchronization apparatus and demodulating apparatus using the same

• US 6,999,406 B2
• Filed: 12/05/2001
• Issued: 02/14/2006
• Est. Priority Date: 12/08/2000
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Suzuki, Mitsuhiro, Takahashi, Hiroaki
• Primary Examiner(s): Rao, Seema S.
• Assistant Examiner(s): Bhandari, Puneet
• Application Number:
  US10/010,681
• Publication Number:
  US 20020105903A1
• Time in Patent Office: 1,532 Days
• Field of Search: 370203-211, 370503-512, 370/517, 370/350, 370/343, 375362-366
• US Class Current: 370/208
• CPC Class Codes: H04B 7/2687 Inter base stations synchronisation
• CPC Class Codes: H04L 27/2662 Symbol synchronisation
• CPC Class Codes: H04L 27/2678 using cyclostationarities, e.g. cyclic prefix or postfix

Abstract

A reception synchronization apparatus capable of achieving precise synchronization of an OFDM signal including a frame guard added to the OFDM signal includes a multiplier for calculating the correlation between a received OFDM signal and an OFDM signal delayed by a delay circuit; a moving integration circuit for adding a signal from the multiplier over a guard period; n frame guard removing circuits, which respectively receive a signal from the moving integration circuit, remove the frame guard period from the received signal, and output a resultant signal; n interval integrators for cumulatively adding signals outputted from the frame guard removing circuits; and a detection circuit for detecting a maximum peak from the results from the n interval integrators and generating a detection signal indicating a synchronization timing position corresponding to the detected maximum peak position.

Claims

1. A reception synchronization apparatus for detecting a synchronization timing position thereby determining an effective symbol period from an OFDM signal, each frame of which includes a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the reception synchronization apparatus comprising:

a delay circuit for delaying a received OFDM signal by the effective symbol period;

a calculation circuit for calculating a correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;

a frame guard removing circuit that receives a signal outputted from the calculation circuit, removes a frame guard period from a frame period of the received signal, and outputs a resultant signal;

an interval integrator for cumulatively adding the signal outputted from the frame guard removing circuit, from one time slot period to another; and

a detection circuit for detecting a maximum peak from the interval integration signal obtained for the intervals of time slot periods and generating a detection signal indicating a synchronization timing position corresponding to the a position of the detected maximum peak, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the position of the maximum peak.

2. The reception synchronization apparatus according to claim 1, further comprising an offset compensation signal generator for generating an offset compensation signal, whereby a supplied synchronization timing signal indicating a timing of extracting the effective symbol period is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error, and the offset compensation signal is generated depending upon the measured synchronization timing error.

3. The reception synchronization apparatus according to claim 1, wherein the detection circuit detects the maximum peak by employing the guard periods as synchronization points.

4. The reception synchronization apparatus according to claim 2, wherein the detection circuit detects the maximum peak by employing the guard periods as synchronization points.

5. The reception synchronization apparatus according to claim 1, wherein the frame guard period is a non-signal period.

6. A reception synchronization apparatus for detecting a synchronization timing position thereby determining an effective symbol period from an OFDM signal, each frame of which includes a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the reception synchronization apparatus comprising:

a delay circuit for delaying a received OFDM signal by the effective symbol period;

a calculation circuit for calculating a correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;

a moving integration circuit for adding the signal outputted from the calculation circuit over an entire guard period;

a frame guard removing circuit that receives a signal outputted from the moving integration circuit, removes a frame guard period from a frame period of the received signal, and outputs a resultant signal;

an interval integrator for cumulatively adding the signal outputted from the frame guard removing circuit, from one time slot period to another;

and a detection circuit for detecting a maximum peak from the interval integration signal obtained for the intervals of time slot periods and generating a detection signal indicating a synchronization timing position corresponding to a position of the detected maximum peak, the detection signal being used to extract the effective symbol period with a timing corresponding to the maximum peak position.

7. The reception synchronization apparatus according to claim 6, further comprising an offset compensation signal generator for generating an offset compensation signal, whereby a supplied synchronization timing signal indicating a timing of extracting the effective symbol period is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error, and the offset compensation signal is generated depending upon the measured synchronization timing error.

8. The reception synchronization apparatus according to claim 6, wherein the detection circuit detects the maximum peak by employing the guard periods as synchronization points.

9. The reception synchronization apparatus according to claim 7, wherein the detection circuit detects the maximum peak by employing the guard periods as synchronization points.

10. The reception synchronization apparatus according to claim 6, wherein the frame guard period is a non-signal period.

11. A reception synchronization apparatus for detecting a synchronization timing position thereby determining an effective symbol period from an OFDM signal, each frame of which includes a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the reception synchronization apparatus comprising:

a delay circuit for delaying a received OFDM signal by the effective symbol period;

a calculation circuit for calculating a correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;

n frame guard removing circuits, disposed in correspondence with signals in respective first to nth time slot periods, which receive a signal outputted from the calculation circuit, remove the frame guard period from the received signal, and output a resultant signal;

n interval integration circuits, disposed in correspondence with the respective n frame guard removing circuits, which cumulatively add the signals outputted from corresponding frame guard removing circuits from one time slot to another; and

a detection circuit for detecting a maximum peak from the interval integration signals supplied from the respective n interval integration circuits and generating a detection signal indicating a synchronization timing position corresponding to a position of the detected maximum peak, the detection signal being used to extract the effective symbol period with a timing corresponding to the maximum peak position.

12. The reception synchronization apparatus according to claim 11, further comprising an offset compensation signal generator for generating an offset compensation signal, whereby a supplied synchronization timing signal indicating a timing of extracting the effective symbol period is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error, and the offset compensation signal is generated depending upon the measured synchronization timing error.

13. The reception synchronization apparatus according to claim 11, wherein the detection circuit detects the maximum peak by employing the guard periods as synchronization points.

14. The reception synchronization apparatus according to claim 12, wherein the detection circuit detects the maximum peak by employing the guard periods as synchronization points.

15. The reception synchronization apparatus according to claim 11, wherein the frame guard period is a non-signal period.

16. A reception synchronization apparatus for detecting a synchronization timing position thereby determining an effective symbol period from an OFDM signal, each frame of which includes a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the reception synchronization apparatus comprising:

a delay circuit for delaying a received OFDM signal by the effective symbol period;

a calculation circuit for calculating the correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;

a moving integration circuit for adding the signal outputted from the calculation signal over an entire guard period;

n frame guard removing circuits, disposed in correspondence with signals in respective first to nth time slot periods, which respectively receive a signal outputted from the moving integration circuit, remove the frame guard period from the received signal, and output a resultant signal;

n interval integration circuits, disposed in correspondence with the respective n frame guard removing circuits, which cumulatively add the signals outputted from corresponding frame guard removing circuits from one time slot to another; and

a detection circuit for detecting a maximum peak from the interval integration signals supplied from the respective n interval integration circuits and generating a detection signal indicating a synchronization timing position corresponding to a position of the detected maximum peak, the detection signal being used to extract the effective symbol period with a precise timing corresponding to the maximum peak position.

17. The reception synchronization apparatus according to claim 16, further comprising an offset compensation signal generator for generating an offset compensation signal, whereby a supplied synchronization timing signal indicating a timing of extracting the effective symbol period is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error, and the offset compensation signal is generated depending upon the measured synchronization timing error.

18. The reception synchronization apparatus according to claim 16, wherein the detection circuit detects the maximum peak by employing the guard periods as synchronization points.

19. The reception synchronization apparatus according to claim 17, wherein the detection circuit detects the maximum peak by employing the guard periods as synchronization points.

20. The reception synchronization apparatus according to claim 16, wherein the frame guard period is a non-signal period.

21. A demodulating apparatus for extracting effective symbol periods from an OFDM signal in synchronization with a synchronization timing signal and demodulating signals in the extracted effective symbol periods, each frame of the OFDM signal including a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the demodulating apparatus comprising:

a timing controller for generating the synchronization timing signal and correcting a synchronization timing based on a supplied offset compensation signal; and

a reception synchronization apparatus including;

a delay circuit for delaying a received OFDM signal by an effective symbol period;

a calculation circuit for calculating a correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;

a frame guard removing circuit that receives a signal outputted from the calculation circuit, removes a frame guard period from a frame period of the received signal, and outputs a resultant signal;

an interval integrator for cumulatively adding the resultant signal outputted from the frame guard removing circuit, from one time slot period to another;

a detection circuit for detecting a maximum peak from the interval integration signal obtained for the intervals of time slot periods and generating a detection signal indicating a synchronization timing position corresponding to a position of the detected maximum peak, the detection signal being used to extract the effective symbol period with a timing corresponding to the maximum peak position; and

an offset compensation signal generator for generating the offset compensation signal to be supplied to the timing controller such that the synchronization timing signal is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error and the measured result is supplied as the offset compensation signal to the timing controller.

22. The demodulating apparatus according to claim 21, wherein the detection circuit of the reception synchronization apparatus detects the maximum peak by employing the guard periods as synchronization points.

23. The demodulating apparatus for extracting effective symbol periods from an OFDM signal in synchronization with a synchronization timing signal and demodulating signals in the extracted effective symbol periods, each frame of the OFDM signal including a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the demodulating apparatus comprising:

a timing controller for generating the synchronization timing signal and correcting the synchronization timing based on a supplied offset compensation signal; and

a reception synchronization apparatus including;

a delay circuit for delaying a received OFDM signal by an effective symbol period;

a calculation circuit for calculating a correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;

a moving integration circuit for adding the signal outputted from the calculation signal over an entire guard period;

a frame guard removing circuit that receives a signal outputted from the moving integration circuit, removes a frame guard period from a frame period of the received signal, and outputs a resultant signal;

an interval integrator for cumulatively adding the resultant signal outputted from the frame guard removing circuit, from one time slot period to another;

a detection circuit for detecting a maximum peak from the interval integration signal obtained for the intervals of time slot periods and generating a detection signal indicating a synchronization timing position corresponding to a position of the detected maximum peak, the detection signal being used to extract the effective symbol period with a timing corresponding to the maximum peak position; and

an offset compensation signal generator for generating the offset compensation signal to be supplied to the timing controller such that the synchronization timing signal is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error and the measured result is supplied as the offset compensation signal to the timing controller.

24. The demodulating apparatus according to claim 23, wherein the detection circuit of the reception synchronization apparatus detects the maximum peak by employing the guard periods as synchronization points.

25. A demodulating apparatus for extracting effective symbol periods from an OFDM signal in synchronization with a synchronization timing signal and demodulating signals in the extracted effective symbol periods, each frame of the OFDM signal including a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the demodulating apparatus comprising:

a timing controller for generating the synchronization timing signal and correcting synchronization timing based on a supplied offset compensation signal; and

a reception synchronization apparatus including;

a delay circuit for delaying a received OFDM signal by an effective symbol period;

a calculation circuit for calculating a correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;

n frame guard removing circuits, disposed in correspondence with signals in respective first to nth time slot periods, which receive a signal outputted from the calculation circuit, remove the frame guard period from the received signal, and output a resultant signal;

n interval integration circuits, disposed in correspondence with the respective n frame guard removing circuits, which cumulatively add the signals outputted from corresponding frame guard removing circuits from one time slot period to another;

a detection circuit for detecting a maximum peak from the interval integration signals supplied from the respective n interval integration circuits and generating a detection signal indicating a synchronization timing position corresponding to a position of the detected maximum peak, the detection signal being used to extract the effective symbol period with a timing corresponding to the maximum peak position; and

an offset compensation signal generator for generating the offset compensation signal to be supplied to the timing controller such that the synchronization timing signal is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error and the measured result is supplied as the offset compensation signal to the timing controller.

26. The demodulating apparatus according to claim 25, wherein the detection circuit of the reception synchronization apparatus detects the maximum peak by employing the guard periods as synchronization points.

27. A demodulating apparatus for extracting effective symbol periods from an OFDM signal in synchronization with a synchronization timing signal and demodulating signals in the extracted effective symbol periods, each frame of the OFDM signal including a series of n (integer equal to or greater than 1) time slots and a frame guard period added to the series of n time slots, each time slot including an effective symbol period and a guard period added to the effective symbol period, the demodulating apparatus comprising:

a timing controller for generating the synchronization timing signal and correcting synchronization timing on the basis of a supplied offset compensation signal; and

a reception synchronization apparatus including;

a delay circuit for delaying a received OFDM signal by an effective symbol period;

a calculation circuit for calculating a correlation between the received OFDM signal and an OFDM signal delayed by the delay circuit;

a moving integration circuit for adding the signal outputted from the calculation signal over an entire guard period;

n frame guard removing circuits, disposed in correspondence with signals in respective first to nth time slot periods, which respectively receive a signal outputted from the moving integration circuit, remove the frame guard period from the received signal, and output a resultant signal;

n interval integration circuits, disposed in correspondence with the respective n frame guard removing circuits, which cumulatively add the signals outputted from corresponding frame guard removing circuits from one time slot period to another;

a detection circuit for detecting a maximum peak from the interval integration signals supplied from the respective n interval integration circuits and generating a detection signal indicating a synchronization timing position corresponding to a position of the detected maximum peak, the detection signal being used to extract the effective symbol period with a timing corresponding to the maximum peak position; and

an offset compensation signal generator for generating the offset compensation signal to be supplied to the timing controller such that the synchronization timing signal is compared with the detection signal outputted from the detection circuit to measure a synchronization timing error and the measured result is supplied as the offset compensation signal to the timing controller.

28. The demodulating apparatus according to claim 27, wherein the detection circuit of the reception synchronization apparatus detects the maximum peak by employing the guard periods as synchronization points.