Semiconductor light emitting device integral type semiconductor light emitting unit image display unit and illuminating unit

• US 7,002,182 B2
• Filed: 09/08/2003
• Issued: 02/21/2006
• Est. Priority Date: 09/06/2002
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Suzuki, Jun, Okuyama, Hiroyuki, Biwa, Goshi
• Primary Examiner(s): Wilczewski, Mary
• Assistant Examiner(s): Lewis, Monica
• Application Number:
  US10/657,467
• Publication Number:
  US 20040129929A1
• Time in Patent Office: 897 Days
• Field of Search: 257 79-103
• US Class Current: 257/91
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 27/156 two-dimensional arrays
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/24 of the light emitting region, e.g. non-planar junction

Abstract

A semiconductor light emitting device with improved luminous efficiency is provided. An underlying n-type GaN layer is grown on a sapphire substrate, and a growth mask made from SiO₂ film or the like is formed on the underlying n-type GaN layer. An n-type GaN layer having a hexagonal pyramid shape is selectively grown on a portion, exposed from an opening of the growth mask, of the underlying n-type GaN layer. The growth mask is removed by etching, and then an active layer and a p-type GaN layer are sequentially grown on the entire substrate so as to cover the hexagonal pyramid shaped n-type GaN layer, to form a light emitting device. An n-side electrode and a p-side electrode are then formed.

Claims

1. A semiconductor light emitting device comprising:

a semiconductor layer of a first conductive type formed on a principal plane of a substrate, the semiconductor layer including a raised crystal portion having tilt crystal planes tilted from the principal plane;

at least an active layer and a semiconductor layer of a second conductive type wherein, the active layer and the semiconductor layer are sequentially stacked at least on the tilt crystal planes of the raised crystal portion, and

a first electrode electrically connected to the semiconductor layer of the first conductive type; and

a second electrode electrically connected to the semiconductor layer of the second conductive type wherein, the second electrode are provided on the semiconductor layer of the second conductive type on the raised crystal portion; and

wherein a size of the second electrode is in a range of about 50% or less of a size of the raised crystal portion on which the active layer and the semiconductor layer of the second conductive type have been stacked.

2. The semiconductor light emitting device according to claim 1, wherein the raised crystal portion has a wurtzite type crystal structure.

3. The semiconductor light emitting device according to claim 1, wherein the raised crystal includes a nitride based III–

V compound semiconductor.

4. The semiconductor light emitting device according to claim 1, wherein each of the semiconductor layer of the first conductive type, the active layer, and the semiconductor layer of the second conductive type includes a nitride based III–

V compound semiconductor.

5. The semiconductor light emitting device according to claim 1, wherein the tilt crystal planes includes S-planes.

6. The semiconductor light emitting device according to claim 1, wherein the raised crystal portion is formed into a hexagonal pyramid shape having S-planes as the tilt crystal planes.

7. The semiconductor light emitting device according to claim 1, wherein the raised crystal portion is formed into a hexagonal truncated pyramid shape having S-planes as the tilt crystal planes and a C-plane as an upper plane.

8. An integral type light emitting unit including a stack of a plurality of light emitting devices, each of the light emitting devices comprising:

a semiconductor layer of a first conductive type formed on a principal plane of a substrate, wherein the semiconductor layer includes a raised crystal portion having tilt crystal planes tilted from the principal plane;

at least an active layer and a semiconductor layer of a second conductive type, wherein the active layer and the semiconductor layer are sequentially stacked at least on the tilt crystal planes of the raised crystal portion;

a first electrode electrically connected to the semiconductor layer of the first conductive type; and

a second electrode electrically connected to the semiconductor layer of the second conductive type, wherein the second electrode are provided on the semiconductor layer of the second conductive type on the raised crystal portion, and

wherein a size of the second electrode is in a range of about 50% or less of a size of the raised crystal portion on which the active layer and the semiconductor layer of the second conductive type have been stacked.

9. An image display unit comprising:

a semiconductor layer of a first conductive type formed on one principal plane of a substrate, wherein the semiconductor layer includes a raised crystal portion having tilt crystal planes tilted from the principal plane;

at least an active layer and a semiconductor layer of a second conductive type, wherein the active layer and the semiconductor layer are sequentially stacked at least on the tilt crystal planes of the raised crystal portion;

a first electrode electrically connected to the semiconductor layer of the first conductive type; and

a second electrode electrically connected to the semiconductor layer of the second conductive type, wherein the second electrode being provided on the semiconductor layer of the second conductive type on the raised crystal portion, and

wherein a size of the second electrode is in a range of about 50% or less of a size of the raised crystal portion on which the active layer and the semiconductor layer of the second conductive type have been stacked.

10. An illuminating unit comprising:

a semiconductor layer of a first conductive type formed on a principal plane of a substrate, wherein the semiconductor layer includes a raised crystal portion having tilt crystal planes tilted from the principal plane;

at least an active layer and a semiconductor layer of a second conductive type, wherein the active layer and the semiconductor layer same sequentially stacked at least on the tilt crystal planes of the raised crystal portion;

a first electrode electrically connected to the semiconductor layer of the first conductive type; and

a second electrode electrically connected to the semiconductor layer of the second conductive type, wherein the second electrode is provided on the semiconductor layer of the second conductive type on the raised crystal portion, and

wherein a size of the second electrode is in a range of about 50% or less of a size of the raised crystal portion on which the active layer and the semiconductor layer of the second conductive type have been stacked.