Receivers, methods, and computer program products for an analog modem that receives data signals from a digital modem
First Claim
1. A receiver for demodulating a data signal transmitted from a digital source at a network sampling rate that is synchronized with a network clock, comprising:
- a two-stage interpolator, responsive to digital samples of the data signal, that generates interpolated digital samples in response thereto, the digital samples having a first local sample rate that is synchronized with a local clock and the interpolated digital samples having a second local sample rate that is synchronized with the network clock, the two-stage interpolator comprising;
a polyphase interpolator, responsive to the digital samples of the data signal, that generates first and second estimates for each of the digital samples of the data signal; and
a linear interpolator, responsive to the first and second estimates, that generates the interpolated digital samples;
an adaptive fractionally spaced decision feedback equalizer, responsive to the interpolated digital samples, that generates equalized digital samples at the network sampling rate in synchronization with the network clock; and
a slicer, responsive to the equalized digital samples, that generates detected symbols therefrom corresponding to data from the data signal.
1 Assignment
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Accused Products
Abstract
Receivers, methods, and computer program products can be used to demodulate a data signal transmitted from a digital source, which has a network sampling rate that is synchronized with a network clock. In an illustrative embodiment, a receiver includes a two-stage interpolator that receives digital samples of the data signal as an input and produces an interpolated digital sample stream to be filtered by an adaptive fractionally spaced decision feedback equalizer. The digital samples received in the interpolator are synchronized with a local clock; however, the interpolated sample stream is synchronized with the network clock. A slicer generates symbols for the samples output from the decision feedback equalizer by comparing the samples with a reference signaling alphabet. The receiver can be used in a V.90 client modem to demodulate pulse code modulated (PCM) data transmitted as pulse amplitude modulated (PAM) signals from a digital network. In addition, the receiver is compatible with legacy analog modem front ends and transmitters. The two-stage interpolator allows the timing synchronization to be performed with extremely fine granularity, which can be useful in PCM modems that typically require relatively high signal to noise ratios.
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Citations
24 Claims
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1. A receiver for demodulating a data signal transmitted from a digital source at a network sampling rate that is synchronized with a network clock, comprising:
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a two-stage interpolator, responsive to digital samples of the data signal, that generates interpolated digital samples in response thereto, the digital samples having a first local sample rate that is synchronized with a local clock and the interpolated digital samples having a second local sample rate that is synchronized with the network clock, the two-stage interpolator comprising; a polyphase interpolator, responsive to the digital samples of the data signal, that generates first and second estimates for each of the digital samples of the data signal; and a linear interpolator, responsive to the first and second estimates, that generates the interpolated digital samples; an adaptive fractionally spaced decision feedback equalizer, responsive to the interpolated digital samples, that generates equalized digital samples at the network sampling rate in synchronization with the network clock; and a slicer, responsive to the equalized digital samples, that generates detected symbols therefrom corresponding to data from the data signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A method for demodulating, in a receiver, a data signal transmitted from a digital source at a network sampling rate that is synchronized with a network clock, comprising the steps of:
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sampling the data signal to produce digital samples at a first local sample rate that is synchronized with a local clock; interpolating the digital samples to produce first and second estimates for each of the digital samples using a polyphase interpolator; interpolating, using a linear interpolator, the first and second estimates to produce interpolated digital samples having a second local sample rate that is synchronized with the network clock; equalizing the interpolated digital samples to produce equalized digital samples; and decoding the equalized digital samples to generate detected symbols therefrom. - View Dependent Claims (12, 13, 14, 15, 17)
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16. A method as recited in 15, wherein the identifying step comprises the steps of:
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establishing a plurality of alphabet thresholds corresponding to valid data symbols; computing an average value for the equalized digital samples corresponding to a particular alphabet threshold; and updating the particular alphabet threshold with the average value.
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18. A computer program product for demodulating, in a receiver, a data signal transmitted from a digital source at a network sampling rate that is synchronized with a network clock, comprising:
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a computer readable storage medium having computer readable code means embodied therein, the computer readable code means comprising; first logic configured to sample the data signal to produce digital samples at a first local sample rate that is synchronized with a local clock; second logic configured to interpolate the digital samples to produce first and second estimates for each of the digital samples, the second logic configured to interpolate comprising; third logic configured to use a polyphase interpolator to produce the first and second estimates; fourth logic configured to interpolate the first and second estimates to produce interpolated digital samples having a second local sample rate that is synchronized with the network clock, the fourth logic configured to interpolate comprising; fifth logic configured to use a linear interpolator to produce the interpolated digital samples; sixth logic configured to equalize the interpolated digital samples to produce equalized digital samples; and seventh logic configured to decode the equalized digital samples to generate detected symbols therefrom. - View Dependent Claims (19, 20, 21, 22, 23, 24)
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Specification