Routing method and apparatus that use of diagonal routes
First Claim
Patent Images
1. A method of routing a net within a particular region of an integrated circuit (“
- IC”
) layout, the net having a set of pins, the method comprising;
a) partitioning the particular IC region into a plurality of sub-regions, wherein each sub-region has the same four-sided shape; and
b) identifying a route that connects a set of sub-regions containing the pins of the net, wherein the route has a route edge that is at least partially diagonal, wherein the diagonal edge intersects a corner vertex shared by two diagonally aligned, four-sided sub-regions.
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Abstract
The invention is directed towards routing method and apparatus. Some embodiments provide a routing method that uses diagonal routes. This method routes several nets within a region of a circuit layout. Each net includes a set of pins in the region. The method initially partitions the region into several sub-regions. For each particular net in the region, the method then identifies a route that connects the sub-regions that contains a pin from the set of pins of the particular net. Some of the identified routes have edges that are at least partially diagonal.
141 Citations
26 Claims
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1. A method of routing a net within a particular region of an integrated circuit (“
- IC”
) layout, the net having a set of pins, the method comprising;a) partitioning the particular IC region into a plurality of sub-regions, wherein each sub-region has the same four-sided shape; and
b) identifying a route that connects a set of sub-regions containing the pins of the net, wherein the route has a route edge that is at least partially diagonal, wherein the diagonal edge intersects a corner vertex shared by two diagonally aligned, four-sided sub-regions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method of routing a set of nets within a region of an integrated circuit (“
- IC”
) layout, wherein each net includes a set of pins in the region, the method comprising;partitioning the IC region into several sub-regions, wherein each sub-region is a quadrilateral;
for each particular net in the region, identifying each sub-region that contains a pin from the set of pins of the particular net, and identifying a route that connects the identified sub-regions for the particular net;
wherein some of the identified routes have route edges that are at least partially diagonal, wherein at least one of the diagonal edges connects two diagonally aligned sub-regions by traversing through a corner vertex shared between the two sub-regions. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21)
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22. A computer readable medium comprising a computer program having executable code, the computer program for routing a net within a particular region of an integrated circuit (“
- IC”
) layout, the net having a plurality of pins, the computer program comprising;a) a first set of instructions for partitioning the particular IC region into several sub-regions, wherein each sub-region has the same four-sided shape; and
b) a second set of instructions for identifying a route that connects a set of sub-regions containing the pins of the net, wherein the route has a route edge that is at least partially diagonal, wherein the diagonal edge intersects a corner vertex shared by two diagonally aligned, four-sided sub-regions. - View Dependent Claims (23, 24, 25)
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26. A method of routing a net within a particular region of an integrated circuit (“
- IC”
) layout, the net having a set of pins, the method comprising;a) partitioning the particular IC region into a plurality of sub-regions, wherein the sub-regions have the same shape; and
b) identifying a route that connects a set of sub-regions containing the pins of the net, wherein the route has a route edge that is between a first pair of diagonally adjacent sub-regions, wherein the capacity of the route edge is measured from an attribute of another edge that is between a second pair of diagonally adjacent sub-regions, wherein the first and second pair of sub-regions are adjacent to each other.
- IC”
Specification