Structures of and methods of fabricating trench-gated MIS devices
First Claim
1. A process of fabricating an MIS device, the device comprising an active region and a termination region, comprising:
- forming a trench mask over the surface of a semiconductor substrate, the substrate being doped with a material of a first conductivity type, the trench mask having an aperture defining the location of a termination trench to be formed;
etching through the aperture in the trench mask to form a termination trench in the substrate;
removing the trench mask;
forming a first nonconductive layer on a wall of the termination trench;
depositing a layer of a conductive gate material into the termination trench, the conductive gate material overflowing the surface of the substrate outside the termination trench;
etching the gate material without a mask such that a top surface of the gate material in the termination trench is reduced to a level below the surface of the substrate;
depositing a second nonconductive layer over the surface of the substrate;
forming a contact mask over the second nonconductive layer, the contact mask having a gate contact aperture;
etching the second nonconductive layer through the gate contact aperture in the contact mask to form a gate contact aperture in the second nonconductive layer;
removing the contact mask; and
depositing a second conductive layer over the second nonconductive layer, the second conductive layer extending through the gate contact aperture to make contact with the conductive gate material in the termination trench wherein said process does not include a mask for etching a portion of an oxide layer to form a field oxide region in the termination region.
3 Assignments
0 Petitions
Accused Products
Abstract
In a trench-gated MIS device contact is made to the gate within the trench, thereby eliminating the need to have the gate material, typically polysilicon, extend outside of the trench. This avoids the problem of stress at the upper corners of the trench. Contact between the gate metal and the polysilicon is normally made in a gate metal region that is outside the active region of the device. Various configurations for making the contact between the gate metal and the polysilicon are described, including embodiments wherein the trench is widened in the area of contact. Since the polysilicon is etched back below the top surface of the silicon throughout the device, there is normally no need for a polysilicon mask, thereby saving fabrication costs.
-
Citations
17 Claims
-
1. A process of fabricating an MIS device, the device comprising an active region and a termination region, comprising:
-
forming a trench mask over the surface of a semiconductor substrate, the substrate being doped with a material of a first conductivity type, the trench mask having an aperture defining the location of a termination trench to be formed; etching through the aperture in the trench mask to form a termination trench in the substrate; removing the trench mask; forming a first nonconductive layer on a wall of the termination trench; depositing a layer of a conductive gate material into the termination trench, the conductive gate material overflowing the surface of the substrate outside the termination trench; etching the gate material without a mask such that a top surface of the gate material in the termination trench is reduced to a level below the surface of the substrate; depositing a second nonconductive layer over the surface of the substrate; forming a contact mask over the second nonconductive layer, the contact mask having a gate contact aperture; etching the second nonconductive layer through the gate contact aperture in the contact mask to form a gate contact aperture in the second nonconductive layer; removing the contact mask; and depositing a second conductive layer over the second nonconductive layer, the second conductive layer extending through the gate contact aperture to make contact with the conductive gate material in the termination trench wherein said process does not include a mask for etching a portion of an oxide layer to form a field oxide region in the termination region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
-
-
16. A process of fabricating an MIS device comprising:
-
providing a semiconductor substrate doped with a dopant of a first conductivity type; growing an epitaxial layer of a second conductivity type on a semiconductor surface; forming a trench mask over the surface of the epitaxial layer, the trench mask having a first aperture in an active region of the device and a second aperture in a termination region of the device, the termination region being located between the active region and a channel stopper region; etching the epitaxial layer through the first and second apertures in the trench mask to form first and second trenches, the second trench being substantially wider than the first trench; removing the trench mask; forming a first nonconductive layer on a wall of the first and second trenches; depositing a layer of a conductive gate material into the first and second trenches, the layer of conductive gate material overflowing the surface of the substrate outside the trenches; etching the conductive gate material such that a top surface of the conductive gate material in the first trench is reduced to a level below the surface of the substrate and the conductive gate material in the second trench is substantially removed; depositing a second nonconductive layer over the surface of the epitaxial layer and over the gate material in the first trench and into the second trench; forming a contact mask over the second nonconductive layer, the contact mask having a substrate contact aperture and a gate contact aperture; etching the second nonconductive layer through the apertures in the contact mask to form a substrate contact aperture and a gate contact aperture in the second nonconductive layer; removing the contact mask; and depositing a second conductive layer over the second nonconductive layer, the second conductive layer extending through the substrate contact aperture to make contact with the substrate and through the gate contact aperture to make contact with the conductive gate material wherein said process does not include a mask for etching a portion of an oxide layer to form a field oxide region in the termination region. - View Dependent Claims (17)
-
Specification