High speed multi-port serial-to-PCI bus interface
First Claim
1. In a combination including an HDLC formatter and a message processing core, a high speed message exchange interface for transferring messages between said HDLC formatter and said message processing core with minimal utilization of processing resources, comprising:
- a memory shared by said HDLC formatter and said message processing core;
a handshaking system for coordinating message storage and retrieval in said shared memory by said HDLC formatter and said message processing core, said handshaking system implementing an information exchange mechanism whereby said HDLC formatter and said message processing core share memory location information relative to messages said HDLC formatter and said message processing core have respectively stored and retrieved in said shared memory;
said information exchange mechanism being periodically initiated by said processor core accessing said HDLC formatter;
said handshaking system including a shared storage location in said HDLC formatter containing pointers that provide information about locations in said shared memory where receive messages have been stored and transmit messages have been retrieved by said HDLC formatter, where transmit messages have been stored by said message processing core, and where receive messages can be stored by said HDLC formatter;
said pointers including first and second pointers written by said HDLC formatter and respectively indicating where messages have been stored and retrieved in said shared memory by said HDLC formatter, and third and fourth pointers written by said message processing core and respectively indicating where messages have been stored in said shared memory by said message processing core and where messages can be stored by said HDLC formatter;
said pointers being index pointers that point to locations in corresponding FIFOs, each FIFO containing pointers to message blocks in said shared memory;
said FIFOs including a RCV FIFO for Receive messages placed in said shared memory by said HDLC formatter and a TX FIFO for Transmit messages placed in said shared memory by said message processing core;
said shared location containing said pointers being part of said HDLC formatter but accessible by said message processing core via single-beat PCI bus accesses;
said first pointer pointing to a location in said RCV FIFO that contains a pointer to a last Receive message stored in said shared memory by said HDLC formatter;
said second pointer pointing to a location in said TX FIFO that contains a pointer to a last Transmit message retrieved from said shared memory by said HDLC formatter;
said third pointer pointing to a location in said RCV FIFO that contains a pointer to a last Receive message buffer area made available in said shared memory by said message processing core; and
said fourth pointer pointing to a location in said TX FIFO that contains a pointer to a last Transmit message stored in said shared memory by said message processing core.
1 Assignment
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Accused Products
Abstract
An HDLC formatter and a message processing core exchange messages over a high speed message exchange interface. The interface includes a memory shared by the HDLC formatter and the message processing core. A handshaking arrangement is used to coordinate message storage and retrieval in the shared memory by the HDLC formatter and the message processing core with minimal utilization of processing resources of the message processing core. This handshaking coordination, together with the use of a message buffer accessed by the HDLC formatter to buffer channelized messages exchanged with the message processing core, facilitates message processing on multiple serial links (e.g., 3) over multiple timeslots (e.g., 256).
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Citations
19 Claims
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1. In a combination including an HDLC formatter and a message processing core, a high speed message exchange interface for transferring messages between said HDLC formatter and said message processing core with minimal utilization of processing resources, comprising:
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a memory shared by said HDLC formatter and said message processing core; a handshaking system for coordinating message storage and retrieval in said shared memory by said HDLC formatter and said message processing core, said handshaking system implementing an information exchange mechanism whereby said HDLC formatter and said message processing core share memory location information relative to messages said HDLC formatter and said message processing core have respectively stored and retrieved in said shared memory; said information exchange mechanism being periodically initiated by said processor core accessing said HDLC formatter; said handshaking system including a shared storage location in said HDLC formatter containing pointers that provide information about locations in said shared memory where receive messages have been stored and transmit messages have been retrieved by said HDLC formatter, where transmit messages have been stored by said message processing core, and where receive messages can be stored by said HDLC formatter; said pointers including first and second pointers written by said HDLC formatter and respectively indicating where messages have been stored and retrieved in said shared memory by said HDLC formatter, and third and fourth pointers written by said message processing core and respectively indicating where messages have been stored in said shared memory by said message processing core and where messages can be stored by said HDLC formatter; said pointers being index pointers that point to locations in corresponding FIFOs, each FIFO containing pointers to message blocks in said shared memory; said FIFOs including a RCV FIFO for Receive messages placed in said shared memory by said HDLC formatter and a TX FIFO for Transmit messages placed in said shared memory by said message processing core; said shared location containing said pointers being part of said HDLC formatter but accessible by said message processing core via single-beat PCI bus accesses; said first pointer pointing to a location in said RCV FIFO that contains a pointer to a last Receive message stored in said shared memory by said HDLC formatter; said second pointer pointing to a location in said TX FIFO that contains a pointer to a last Transmit message retrieved from said shared memory by said HDLC formatter; said third pointer pointing to a location in said RCV FIFO that contains a pointer to a last Receive message buffer area made available in said shared memory by said message processing core; and said fourth pointer pointing to a location in said TX FIFO that contains a pointer to a last Transmit message stored in said shared memory by said message processing core. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method for rapid, high volume message exchange between an HDLC formatter and a message processing core, comprising the steps of:
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establishing a shared memory for storing said messages, said shared memory being independently accessible by said HDLC formatter and said message processing core; establishing a RCV FIFO containing pointers to Receive messages placed in said shared memory by said HDLC formatter and a TX FIFO containing pointers to Transmit messages placed in said shared memory by said message processing core; establishing a shared storage location containing index pointers to said FIFOs, said pointers including; a first index pointer pointing to a location in said RCV FIFO that contains a pointer to the last Receive message stored in said shared memory by said HDLC formatter; a second index pointer pointing to a location in said TX FIFO that contains a pointer to the last Transmit message retrieved from said shared memory by said HDLC formatter; a third index pointer pointing to a location in said RCV FIFO that contains a pointer to the last Receive message buffer area made available in said shared memory by said message processing core; and a fourth index pointer pointing to a location in said TX FIFO that contains a pointer to the last Transmit message stored in said shared memory by said message processing core; and said HDLC formatter and said message processing core using said index pointers to negotiate access to said share memory.
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19. A combination comprising:
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an HDLC formatter; a message processing core for processing messages; said HDLC formatter having a serial interface for receiving/transmitting messages on one or more serial links carrying said messages in multiple timeslots; said HDLC formatter further including a timeslot-to-channel conversion circuit for extracting message information from said serial timeslots and placing it in corresponding message bearing channels; said HDLC formatter being adapted to access a message buffer memory for storing messages waiting to be transferred to, and which have been received from, said message processing core;
said message buffer memory maintaining a linked list for each of said message bearing channels to store messages relative to each channel;said HDLC formatter further including a parallel interface for transferring said messages to and from said message processing core; said message processing core including a processor for processing messages provided by said HDLC formatter; a shared memory for storing said messages, said shared memory being independently accessible by said HDLC formatter and said message processing core; a RCV FIFO containing pointers to RCV messages placed in said shared memory by said HDLC formatter; a TX FIFO containing pointers to TX messages placed in said shared memory by said message processing core; a shared storage location containing index pointers to said FIFOs, said pointers including; a first index pointer pointing to a location in said RCV FIFO that contains a pointer to the last RCV message stored in said shared memory by said HDLC formatter; a second index pointer pointing to a location in said TX FIFO that contains a pointer to the last TX message retrieved from said shared memory by said HDLC formatter; a third index pointer pointing to a location in said RCV FIFO that contains a pointer to the last RCV message buffer area made available in said shared memory by said message processing core; and a fourth index pointer pointing to a location in said TX FIFO that contains a pointer to the last TX message stored in said shared memory by said message processing core; and respective means in said HDLC formatter and said message processing core for utilizing said index pointers to negotiate access to said shared memory.
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Specification